CD4050BM

{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4050bm",
  "title": "CD4050BM",
  "brief": "HGSEMI Buffer/Driver/Transceiver, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "cd4050bm"
  ],
  "component": {
    "mpn": "CD4050BM",
    "manufacturer": "HGSEMI",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Buffer/Driver/Transceiver",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/782d71459e77ba4a1de047be7cc7eebf.pdf",
    "parts": {
      "symbol": "cd4050bm.kicad_sym",
      "footprint": "cd4050bm.kicad_mod",
      "model_3d": "cd4050bm-etched.glb",
      "model_3d_plain": "cd4050bm.glb",
      "model_3d_step": "cd4050bm-etched.step",
      "model_3d_step_plain": "cd4050bm.step",
      "lbr": "cd4050bm.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply rail. Recommended operating range 5 V to 15 V; absolute maximum -0.5 V to +18 V referenced to VSS."
      },
      {
        "number": "2",
        "name": "G (1Y)",
        "type": "output",
        "description": "Buffer 1 output (non-inverting). Equal to logic level of input A on pin 3. Drives ~1 mA IOL at VDD=5 V, VO=0.4 V."
      },
      {
        "number": "3",
        "name": "A (1A)",
        "type": "input",
        "description": "Buffer 1 input. High-voltage tolerant CMOS input (VIN may exceed VDD, up to +18 V absolute max). Non-inverting path to output G on pin 2."
      },
      {
        "number": "4",
        "name": "H (2Y)",
        "type": "output",
        "description": "Buffer 2 output (non-inverting). Equal to logic level of input B on pin 5."
      },
      {
        "number": "5",
        "name": "B (2A)",
        "type": "input",
        "description": "Buffer 2 input. High-voltage tolerant CMOS input (may exceed VDD up to +18 V abs max). Feeds output H on pin 4."
      },
      {
        "number": "6",
        "name": "I (3Y)",
        "type": "output",
        "description": "Buffer 3 output (non-inverting). Equal to logic level of input C on pin 7."
      },
      {
        "number": "7",
        "name": "C (3A)",
        "type": "input",
        "description": "Buffer 3 input. High-voltage tolerant CMOS input. Feeds output I on pin 6."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference (0 V). All input/output levels are referenced to this pin."
      },
      {
        "number": "9",
        "name": "D (4A)",
        "type": "input",
        "description": "Buffer 4 input. High-voltage tolerant CMOS input. Feeds output J on pin 10."
      },
      {
        "number": "10",
        "name": "J (4Y)",
        "type": "output",
        "description": "Buffer 4 output (non-inverting). Equal to logic level of input D on pin 9."
      },
      {
        "number": "11",
        "name": "E (5A)",
        "type": "input",
        "description": "Buffer 5 input. High-voltage tolerant CMOS input. Feeds output K on pin 12."
      },
      {
        "number": "12",
        "name": "K (5Y)",
        "type": "output",
        "description": "Buffer 5 output (non-inverting). Equal to logic level of input E on pin 11."
      },
      {
        "number": "13",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection. Leave floating or tie to VSS/VDD per PCB convention."
      },
      {
        "number": "14",
        "name": "F (6A)",
        "type": "input",
        "description": "Buffer 6 input. High-voltage tolerant CMOS input. Feeds output L on pin 15."
      },
      {
        "number": "15",
        "name": "L (6Y)",
        "type": "output",
        "description": "Buffer 6 output (non-inverting). Equal to logic level of input F on pin 14."
      },
      {
        "number": "16",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection. Leave floating or tie to VSS/VDD per PCB convention."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/782d71459e77ba4a1de047be7cc7eebf.pdf",
        "pages": 11,
        "sha256": "d1b47e24b0ba71a2",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4050",
      "logic_family": "CD4000",
      "function_code": "4050",
      "function_class": "Buffer",
      "function_name": "Hex Non-Inverting Buffer / Level Translator",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4050bm.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4050bm-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d3dd3d4535f78457c1b39917fc4addab2f5ce37d6955e6762d19659382ddb4e6",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "HGSEMI",
      "Package": "SOP-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4050bm"
  ],
  "discovery_pitch": "CD4050BM (HGSEMI) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4050bm.kicad_sym",
    "cd4050bm.kicad_mod",
    "cd4050bm.glb",
    "cd4050bm.step",
    "cd4050bm.lbr",
    "docs/hero.png",
    "docs/cd4050bm-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4050bm-etched.step"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "CD4050BE",
      "kind": "unknown"
    },
    {
      "mpn": "CD4050BN",
      "kind": "unknown"
    },
    {
      "mpn": "CD4050BM/TR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4050BMT/TR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4050BLQ/TR",
      "kind": "unknown"
    }
  ],
  "updated_at": "2026-09-24T18:42:15.528Z"
}