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CD4050BE

Public Made by Adom

by adom

XBLW Buffers, Drivers, Receivers, Transceivers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers cd4050be: viewers · Ray 7d ago
cd4050be-etched.glb Publish 0.1.0 · Ray 7d ago
cd4050be-etched.step cd4050be: factory component page (tier=lcsc) · Ray 7d ago
cd4050be-hero.glb cd4050be: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
cd4050be-hero.overlay.json Publish 0.1.0 · Ray 7d ago
cd4050be.glb Publish 0.1.0 · Ray 7d ago
cd4050be.kicad_mod Publish 0.1.0 · Ray 7d ago
cd4050be.kicad_sym Publish 0.1.0 · Ray 7d ago
cd4050be.lbr Publish 0.1.0 · Ray 7d ago
cd4050be.step Publish 0.1.0 · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago

CD4050BE

XBLW · Buffers, Drivers, Receivers, Transceivers · DIP-16

CD4050BE from XBLW, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Supply voltage, recommended 3V to 15V referenced to VSS (absolute maximum -0.5V to +18V).
2 1Y output Buffer 1 non-inverting output.
3 1A input Buffer 1 input; unused inputs must be connected to VDD, VSS or another input.
4 2Y output Buffer 2 non-inverting output.
5 2A input Buffer 2 input; unused inputs must be connected to VDD, VSS or another input.
6 3Y output Buffer 3 non-inverting output.
7 3A input Buffer 3 input; unused inputs must be connected to VDD, VSS or another input.
8 VSS power_in Ground supply voltage (usually ground).
9 4A input Buffer 4 input; unused inputs must be connected to VDD, VSS or another input.
10 4Y output Buffer 4 non-inverting output.
11 5A input Buffer 5 input; unused inputs must be connected to VDD, VSS or another input.
12 5Y output Buffer 5 non-inverting output.
13 n.c. unconnected Not connected.
14 6A input Buffer 6 input; unused inputs must be connected to VDD, VSS or another input.
15 6Y output Buffer 6 non-inverting output.
16 n.c. unconnected Not connected.

Key specifications

Parameter Value
Manufacturer XBLW
Package DIP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD4050BE
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4050be-etched.step / cd4050be-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4050be.step / cd4050be.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (12 pp, sha256 344ffc7aeec10d90, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF