component
CD4049UBE
Public Made by Adomby adom
Texas Instruments Inverters, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD4049UBE
Texas Instruments · Inverters · DIP-16
CD4049UBE from Texas Instruments, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive supply voltage pin, 3V to 18V operating range. |
| 2 | G | output | Inverting output 1, produces logic inverse of input A. |
| 3 | A | input | Digital logic input 1 for first inverting buffer stage. |
| 4 | H | output | Inverting output 2, produces logic inverse of input B. |
| 5 | B | input | Digital logic input 2 for second inverting buffer stage. |
| 6 | I | output | Inverting output 3, produces logic inverse of input C. |
| 7 | C | input | Digital logic input 3 for third inverting buffer stage. |
| 8 | VSS | power_in | Ground and negative power supply reference. |
| 9 | D | input | Digital logic input 4 for fourth inverting buffer stage. |
| 10 | J | output | Inverting output 4, produces logic inverse of input D. |
| 11 | E | input | Digital logic input 5 for fifth inverting buffer stage. |
| 12 | K | output | Inverting output 5, produces logic inverse of input E. |
| 13 | NC | unconnected | No connection; internally unconnected pin. |
| 14 | F | input | Digital logic input 6 for sixth inverting buffer stage. |
| 15 | L | output | Inverting output 6, produces logic inverse of input F. |
| 16 | NC | unconnected | No connection; internally unconnected pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DIP-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4049UBE - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4049ube-etched.step/cd4049ube-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4049ube.step/cd4049ube.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
5124f83b43bb3822, retrieved 2026-10-03, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD4049UBE
**Texas Instruments** · Inverters · DIP-16
CD4049UBE from Texas Instruments, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive supply voltage pin, 3V to 18V operating range. |
| 2 | G | output | Inverting output 1, produces logic inverse of input A. |
| 3 | A | input | Digital logic input 1 for first inverting buffer stage. |
| 4 | H | output | Inverting output 2, produces logic inverse of input B. |
| 5 | B | input | Digital logic input 2 for second inverting buffer stage. |
| 6 | I | output | Inverting output 3, produces logic inverse of input C. |
| 7 | C | input | Digital logic input 3 for third inverting buffer stage. |
| 8 | VSS | power_in | Ground and negative power supply reference. |
| 9 | D | input | Digital logic input 4 for fourth inverting buffer stage. |
| 10 | J | output | Inverting output 4, produces logic inverse of input D. |
| 11 | E | input | Digital logic input 5 for fifth inverting buffer stage. |
| 12 | K | output | Inverting output 5, produces logic inverse of input E. |
| 13 | NC | unconnected | No connection; internally unconnected pin. |
| 14 | F | input | Digital logic input 6 for sixth inverting buffer stage. |
| 15 | L | output | Inverting output 6, produces logic inverse of input F. |
| 16 | NC | unconnected | No connection; internally unconnected pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DIP-16 |
| Category | Logic |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `CD4049UBE`
- Footprint: `Package_DIP:DIP-16_W7.62mm`
- 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files: `cd4049ube-etched.step` / `cd4049ube-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4049ube.step` / `cd4049ube.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4049ub) (39 pp, sha256 `5124f83b43bb3822`, retrieved 2026-10-03, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd4049ube-datasheet.pdf)