# CD4049BE

**XBLW** · Buffers, Drivers, Receivers, Transceivers · DIP-16

CD4049BE from XBLW, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply voltage, recommended 3V to 15V referenced to VSS. |
| 2 | 1Y | output | Data output of inverting buffer 1. |
| 3 | 1A | input | Data input of inverting buffer 1; unused inputs must be tied to VDD, VSS or another input. |
| 4 | 2Y | output | Data output of inverting buffer 2. |
| 5 | 2A | input | Data input of inverting buffer 2; unused inputs must be tied to VDD, VSS or another input. |
| 6 | 3Y | output | Data output of inverting buffer 3. |
| 7 | 3A | input | Data input of inverting buffer 3; unused inputs must be tied to VDD, VSS or another input. |
| 8 | VSS | power_in | Ground supply voltage (usually ground). |
| 9 | 4A | input | Data input of inverting buffer 4; unused inputs must be tied to VDD, VSS or another input. |
| 10 | 4Y | output | Data output of inverting buffer 4. |
| 11 | 5A | input | Data input of inverting buffer 5; unused inputs must be tied to VDD, VSS or another input. |
| 12 | 5Y | output | Data output of inverting buffer 5. |
| 13 | n.c. | unconnected | Not connected. |
| 14 | 6A | input | Data input of inverting buffer 6; unused inputs must be tied to VDD, VSS or another input. |
| 15 | 6Y | output | Data output of inverting buffer 6. |
| 16 | n.c. | unconnected | Not connected. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | DIP-16 |
| Category | Logic |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `CD4049BE`
- Footprint: `Package_DIP:DIP-16_W7.62mm`
- 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files: `cd4049be-etched.step` / `cd4049be-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4049be.step` / `cd4049be.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [XBLW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590906012037959680) (11 pp, sha256 `eb8bd7f732638e54`, retrieved 2026-10-14, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4049be-datasheet.pdf)