component

CD4047BM96

Public Made by Adom

by adom

Texas Instruments Monostable Multivibrators, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cd4047bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cd4047bm96-etched.fit.json cd4047bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4047bm96-etched.glb cd4047bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4047bm96-etched.step cd4047bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4047bm96.glb Publish 0.1.0 · Ray
cd4047bm96.kicad_mod Publish 0.1.0 · Ray
cd4047bm96.kicad_sym Publish 0.1.0 · Ray
cd4047bm96.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cd4047bm96.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json cd4047bm96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md cd4047bm96: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CD4047BM96

Texas Instruments · Monostable Multivibrators · SOP-14

CD4047BM96 from Texas Instruments, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C passive External timing capacitor connection (C-TIMING). External capacitor is connected between terminals 1 and 3.
2 R passive External timing resistor connection (R-TIMING). External resistor is connected between terminals 2 and 3.
3 RC COMMON passive RC common terminal. Shared node between the external R and C timing components. Sensitive to static electrical discharge; extra handling precautions recommended.
4 /ASTABLE input Astable enable (active-low, complement). A low level on this input (or a high on ASTABLE) enables astable free-running operation.
5 ASTABLE input Astable enable (active-high). A high level on this input enables astable free-running operation; used as gate input in True Gating mode.
6 -TRIGGER input Negative-edge trigger input for monostable operation. A high-to-low transition triggers the monostable pulse.
7 VSS power_in Negative supply / ground reference. Supply voltage range 3V to 18V referenced between VDD (pin 14) and VSS (pin 7).
8 +TRIGGER input Positive-edge trigger input for monostable operation. A low-to-high transition triggers the monostable pulse.
9 EXTERNAL RESET input External reset input. A high level assures no output pulse during an ON power condition; can also be activated to terminate the output pulse at any time.
10 Q output Buffered true output of the multivibrator. In astable mode outputs half of the oscillator period; in monostable mode delivers the timed pulse.
11 /Q output Buffered complemented output of the multivibrator. Inverse of Q output.
12 RETRIGGER input Retrigger input. When pulsed (or held high), retriggerable monostable operation is enabled; the device will retrigger on positive-going edges as long as this input is high.
13 OSC OUT output Oscillator output. Provides direct oscillator signal (first positive 1/2 cycle pulse-width = 2.48 RC). 50% duty cycle not guaranteed on this output in astable mode.
14 VDD power_in Positive supply voltage. Recommended operating range 3V to 18V; absolute maximum -0.5V to +20V referenced to VSS.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOP-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • CD4047BM96M
  • CD4047BM96
  • CD4047BM96MT
  • CD4047BM96NSR
  • CD4047BM96F3A
  • CD4047BM96E
  • CD4047BM96PW
  • CD4047BM96PWR

CAD (KiCad official)

  • Symbol: CD4047BM96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4047bm96-etched.step / cd4047bm96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4047bm96.step / cd4047bm96.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cd4047bm96.step 195 KB You want the bare part, or you mark your own boards.
cd4047bm96-etched.step 2.4 MB You want the part with CD4047BM96 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 608 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (21 pp, sha256 5ca5786f57107195, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF