component
CD4044BPWR
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Texas Instruments Latches, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CD4044BPWR++**Texas Instruments** · Latches · TSSOP-16++CD4044BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Q4 | tri_state | 3-state Q output of latch 4, connected to the latch state when ENABLE is high and open circuit when ENABLE is low. |+| 2 | NC | unconnected | No internal connection. |+| 3 | S1 | input | SET input of latch 1 (CD4044B NAND latch, active-low set; dominated by R=0 input). |+| 4 | R1 | input | RESET input of latch 1 (CD4044B NAND latch, active-low reset). |+| 5 | ENABLE | input | Common output enable: logic 1 connects latch states to the Q outputs, logic 0 leaves the Q outputs open circuit. |+| 6 | R2 | input | RESET input of latch 2 (CD4044B NAND latch, active-low reset). |+| 7 | S2 | input | SET input of latch 2 (CD4044B NAND latch, active-low set). |+| 8 | VSS | power_in | Ground/negative supply; all voltages are referenced to VSS. |+| 9 | Q2 | tri_state | 3-state Q output of latch 2, controlled by ENABLE. |+| 10 | Q3 | tri_state | 3-state Q output of latch 3, controlled by ENABLE. |+| 11 | S3 | input | SET input of latch 3 (CD4044B NAND latch, active-low set). |+| 12 | R3 | input | RESET input of latch 3 (CD4044B NAND latch, active-low reset). |+| 13 | Q1 | tri_state | 3-state Q output of latch 1, controlled by ENABLE. |+| 14 | R4 | input | RESET input of latch 4 (CD4044B NAND latch, active-low reset). |+| 15 | S4 | input | SET input of latch 4 (CD4044B NAND latch, active-low set). |+| 16 | VDD | power_in | Positive supply, 3 V to 18 V recommended, absolute maximum -0.5 V to +20 V referenced to VSS. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD4044BPWR`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `cd4044bpwr-etched.step` / `cd4044bpwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4044bpwr.step` / `cd4044bpwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4044b.pdf) (36 pp, sha256 `7e0e8438d057119a`, retrieved 2026-10-05, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4044bpwr-datasheet.pdf)
page.jsonadded+208@@ -0,0 +1,208 @@+{+ "slug": "cd4044bpwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Latches, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4044bpwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4044bpwr.kicad_sym",+ "cd4044bpwr.kicad_mod",+ "cd4044bpwr.glb",+ "cd4044bpwr.step",+ "cd4044bpwr.lbr",+ "docs/hero.png",+ "docs/cd4044bpwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cd4044bpwr-hero.glb",+ "cd4044bpwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "CD4044BPWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Latches",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cd4044b.pdf",+ "parts": {+ "symbol": "cd4044bpwr.kicad_sym",+ "footprint": "cd4044bpwr.kicad_mod",+ "model_3d": "cd4044bpwr-hero.glb",+ "model_3d_plain": "cd4044bpwr.glb",+ "model_3d_step": "cd4044bpwr-etched.step",+ "model_3d_step_plain": "cd4044bpwr.step",+ "lbr": "cd4044bpwr.lbr"+ },+ "distributor_links": {+ "lcsc": 74801,+ "digikey": "296-31499-2-ND",+ "mouser": "595-CD4044BPWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T21:25:27Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-31499-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-CD4044BPWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "Q4",+ "type": "tri_state",+ "description": "3-state Q output of latch 4, connected to the latch state when ENABLE is high and open circuit when ENABLE is low."+ },+ {+ "number": "2",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "3",+ "name": "S1",+ "type": "input",+ "description": "SET input of latch 1 (CD4044B NAND latch, active-low set; dominated by R=0 input)."+ },+ {+ "number": "4",+ "name": "R1",+ "type": "input",+ "description": "RESET input of latch 1 (CD4044B NAND latch, active-low reset)."+ },+ {+ "number": "5",+ "name": "ENABLE",+ "type": "input",+ "description": "Common output enable: logic 1 connects latch states to the Q outputs, logic 0 leaves the Q outputs open circuit."+ },+ {+ "number": "6",+ "name": "R2",+ "type": "input",+ "description": "RESET input of latch 2 (CD4044B NAND latch, active-low reset)."+ },+ {+ "number": "7",+ "name": "S2",+ "type": "input",+ "description": "SET input of latch 2 (CD4044B NAND latch, active-low set)."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground/negative supply; all voltages are referenced to VSS."+ },+ {+ "number": "9",+ "name": "Q2",+ "type": "tri_state",+ "description": "3-state Q output of latch 2, controlled by ENABLE."+ },+ {+ "number": "10",+ "name": "Q3",+ "type": "tri_state",+ "description": "3-state Q output of latch 3, controlled by ENABLE."+ },+ {+ "number": "11",+ "name": "S3",+ "type": "input",+ "description": "SET input of latch 3 (CD4044B NAND latch, active-low set)."+ },+ {+ "number": "12",+ "name": "R3",+ "type": "input",+ "description": "RESET input of latch 3 (CD4044B NAND latch, active-low reset)."+ },+ {+ "number": "13",+ "name": "Q1",+ "type": "tri_state",+ "description": "3-state Q output of latch 1, controlled by ENABLE."+ },+ {+ "number": "14",+ "name": "R4",+ "type": "input",+ "description": "RESET input of latch 4 (CD4044B NAND latch, active-low reset)."+ },+ {+ "number": "15",+ "name": "S4",+ "type": "input",+ "description": "SET input of latch 4 (CD4044B NAND latch, active-low set)."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply, 3 V to 18 V recommended, absolute maximum -0.5 V to +20 V referenced to VSS."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet pinout is one top-view diagram for all 16-lead packages. It is not drawn specifically ",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 36,+ "cost_usd": 0.5882,+ "at": "2026-10-05T21:25:11"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cd4044b.pdf",+ "pages": 36,+ "sha256": "7e0e8438d057119a",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}