component
CD4044BPWR
Public Made by Adomby adom
Texas Instruments Latches, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4044BPWR
Texas Instruments · Latches · TSSOP-16
CD4044BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q4 | tri_state | 3-state Q output of latch 4, connected to the latch state when ENABLE is high and open circuit when ENABLE is low. |
| 2 | NC | unconnected | No internal connection. |
| 3 | S1 | input | SET input of latch 1 (CD4044B NAND latch, active-low set; dominated by R=0 input). |
| 4 | R1 | input | RESET input of latch 1 (CD4044B NAND latch, active-low reset). |
| 5 | ENABLE | input | Common output enable: logic 1 connects latch states to the Q outputs, logic 0 leaves the Q outputs open circuit. |
| 6 | R2 | input | RESET input of latch 2 (CD4044B NAND latch, active-low reset). |
| 7 | S2 | input | SET input of latch 2 (CD4044B NAND latch, active-low set). |
| 8 | VSS | power_in | Ground/negative supply; all voltages are referenced to VSS. |
| 9 | Q2 | tri_state | 3-state Q output of latch 2, controlled by ENABLE. |
| 10 | Q3 | tri_state | 3-state Q output of latch 3, controlled by ENABLE. |
| 11 | S3 | input | SET input of latch 3 (CD4044B NAND latch, active-low set). |
| 12 | R3 | input | RESET input of latch 3 (CD4044B NAND latch, active-low reset). |
| 13 | Q1 | tri_state | 3-state Q output of latch 1, controlled by ENABLE. |
| 14 | R4 | input | RESET input of latch 4 (CD4044B NAND latch, active-low reset). |
| 15 | S4 | input | SET input of latch 4 (CD4044B NAND latch, active-low set). |
| 16 | VDD | power_in | Positive supply, 3 V to 18 V recommended, absolute maximum -0.5 V to +20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4044BPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4044bpwr-etched.step/cd4044bpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4044bpwr.step/cd4044bpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
7e0e8438d057119a, retrieved 2026-10-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).