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CD4043BPWR

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by adom

Texas Instruments Latches, TSSOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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CD4043BPWR

Texas Instruments · Latches · TSSOP-16

CD4043BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q1 tri_state 3-state output of latch 1; reflects latch state when ENABLE=1, forced to high impedance when ENABLE=0.
2 Q2 tri_state 3-state output of latch 2; reflects latch state when ENABLE=1, forced to high impedance when ENABLE=0.
3 Q3 tri_state 3-state output of latch 3; reflects latch state when ENABLE=1, forced to high impedance when ENABLE=0.
4 Q4 tri_state 3-state output of latch 4; reflects latch state when ENABLE=1, forced to high impedance when ENABLE=0.
5 EN input Common active-high output enable for all four 3-state Q outputs; logic 1 connects each Q to its latch state, logic 0 forces all Q outputs to high impedance.
6 S4 input NOR Set input for latch 4; Q4 is set high and latched when S4=1 and R4=0; S4=1 with R4=1 is a forbidden state.
7 R4 input NOR Reset input for latch 4; Q4 is reset low and latched when R4=1 and S4=0.
8 VSS power_in Ground supply voltage, 0 V reference; supply voltage range VDD−VSS is 3 V to 18 V (absolute maximum 20 V).
9 NC unconnected No internal connection; leave unconnected.
10 R3 input NOR Reset input for latch 3; Q3 is reset low and latched when R3=1 and S3=0.
11 S3 input NOR Set input for latch 3; Q3 is set high and latched when S3=1 and R3=0.
12 R2 input NOR Reset input for latch 2; Q2 is reset low and latched when R2=1 and S2=0.
13 S2 input NOR Set input for latch 2; Q2 is set high and latched when S2=1 and R2=0.
14 R1 input NOR Reset input for latch 1; Q1 is reset low and latched when R1=1 and S1=0.
15 S1 input NOR Set input for latch 1; Q1 is set high and latched when S1=1 and R1=0.
16 VDD power_in Positive supply voltage; rated 3 V to 18 V, absolute maximum 20 V above VSS; quiescent device current max 20 µA at VDD=18 V, 25 °C.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD4043BPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4043bpwr-etched.step / cd4043bpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4043bpwr.step / cd4043bpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 6b350a9a8cdd953d, retrieved 2026-09-29, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF