component
CD4043BDR
Public Made by Adomby adom
Texas Instruments Latches, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4043BDR
Texas Instruments · Latches · SOIC-16
CD4043BDR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q1 | tri_state | 3-state output of NOR R/S latch 1; high-Z when ENABLE is low, drives latch state when ENABLE is high. |
| 2 | Q2 | tri_state | 3-state output of NOR R/S latch 2; high-Z when ENABLE is low, drives latch state when ENABLE is high. |
| 3 | Q3 | tri_state | 3-state output of NOR R/S latch 3; high-Z when ENABLE is low, drives latch state when ENABLE is high. |
| 4 | Q4 | tri_state | 3-state output of NOR R/S latch 4; high-Z when ENABLE is low, drives latch state when ENABLE is high. |
| 5 | EN | input | Common output ENABLE (active high); logic 1 connects all four latch states to their Q outputs, logic 0 forces all Q pins to high-Z. |
| 6 | R4 | input | NOR Reset input for latch 4; active high, resets Q4 low; dominates when both R4 and S4 are high. |
| 7 | S4 | input | NOR Set input for latch 4; active high, sets Q4 high. |
| 8 | VSS | power_in | Ground reference, 0 V. |
| 9 | S3 | input | NOR Set input for latch 3; active high, sets Q3 high. |
| 10 | R3 | input | NOR Reset input for latch 3; active high, resets Q3 low; dominates when both R3 and S3 are high. |
| 11 | S2 | input | NOR Set input for latch 2; active high, sets Q2 high. |
| 12 | R2 | input | NOR Reset input for latch 2; active high, resets Q2 low; dominates when both R2 and S2 are high. |
| 13 | S1 | input | NOR Set input for latch 1; active high, sets Q1 high. |
| 14 | R1 | input | NOR Reset input for latch 1; active high, resets Q1 low; dominates when both R1 and S1 are high. |
| 15 | NC | unconnected | No internal connection. |
| 16 | VDD | power_in | Positive supply voltage, 3 V to 18 V (20 V absolute maximum). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4043BDR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd4043bdr-etched.step/cd4043bdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4043bdr.step/cd4043bdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
7e0e8438d057119a, retrieved 2026-09-29, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).