component
CD4040BM96
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD4040BM96
Texas Instruments · Counters, Dividers · SOIC-16
CD4040BM96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q12 | output | Buffered output of counter stage 12 (12th ripple-carry stage). |
| 2 | Q6 | output | Buffered output of counter stage 6. |
| 3 | Q5 | output | Buffered output of counter stage 5. |
| 4 | Q7 | output | Buffered output of counter stage 7. |
| 5 | Q4 | output | Buffered output of counter stage 4. |
| 6 | Q3 | output | Buffered output of counter stage 3. |
| 7 | Q2 | output | Buffered output of counter stage 2. |
| 8 | VSS | power_in | Ground / negative supply terminal; all voltages are referenced to VSS. |
| 9 | Q1 | output | Buffered output of counter stage 1. |
| 10 | φ | input | Input-pulse (clock) line with Schmitt trigger action allowing unlimited rise and fall times; counter advances one count on the negative transition of each pulse. |
| 11 | RESET | input | Common reset input; a high level resets the counter to its all-zeros state. |
| 12 | Q9 | output | Buffered output of counter stage 9. |
| 13 | Q8 | output | Buffered output of counter stage 8. |
| 14 | Q10 | output | Buffered output of counter stage 10. |
| 15 | Q11 | output | Buffered output of counter stage 11. |
| 16 | VDD | power_in | Positive supply; recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4040BM96 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd4040bm96-etched.step/cd4040bm96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4040bm96.step/cd4040bm96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
d535d1bb5891e992, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD4040BM96
**Texas Instruments** · Counters, Dividers · SOIC-16
CD4040BM96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q12 | output | Buffered output of counter stage 12 (12th ripple-carry stage). |
| 2 | Q6 | output | Buffered output of counter stage 6. |
| 3 | Q5 | output | Buffered output of counter stage 5. |
| 4 | Q7 | output | Buffered output of counter stage 7. |
| 5 | Q4 | output | Buffered output of counter stage 4. |
| 6 | Q3 | output | Buffered output of counter stage 3. |
| 7 | Q2 | output | Buffered output of counter stage 2. |
| 8 | VSS | power_in | Ground / negative supply terminal; all voltages are referenced to VSS. |
| 9 | Q1 | output | Buffered output of counter stage 1. |
| 10 | φ | input | Input-pulse (clock) line with Schmitt trigger action allowing unlimited rise and fall times; counter advances one count on the negative transition of each pulse. |
| 11 | RESET | input | Common reset input; a high level resets the counter to its all-zeros state. |
| 12 | Q9 | output | Buffered output of counter stage 9. |
| 13 | Q8 | output | Buffered output of counter stage 8. |
| 14 | Q10 | output | Buffered output of counter stage 10. |
| 15 | Q11 | output | Buffered output of counter stage 11. |
| 16 | VDD | power_in | Positive supply; recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `CD4040BM96`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `cd4040bm96-etched.step` / `cd4040bm96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4040bm96.step` / `cd4040bm96.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4040bm96.pdf) (26 pp, sha256 `d535d1bb5891e992`, retrieved 2026-10-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd4040bm96-datasheet.pdf)