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CD4029BM96
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4029BM96
Texas Instruments · Counters, Dividers · SOIC-16
CD4029BM96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PRESET ENABLE | input | A high level on this input asynchronously loads the four JAM inputs into the counter; a low on each JAM line while PRESET ENABLE is high resets the counter to zero count. |
| 2 | Q4 | output | Buffered counter output, most significant bit of the four-stage binary/BCD counter. |
| 3 | JAM 4 | input | Parallel jam data input for bit 4, loaded into the counter when PRESET ENABLE is high. |
| 4 | JAM 1 | input | Parallel jam data input for bit 1, loaded into the counter when PRESET ENABLE is high. |
| 5 | CARRY IN (CLOCK ENABLE) | input | Carry-in/clock-enable input; counter advances only when this signal is low, and it must be connected to VSS when not used. |
| 6 | Q1 | output | Buffered counter output, least significant bit of the four-stage counter. |
| 7 | CARRY OUT | output | Carry-out output, normally high, that goes low when the counter reaches its maximum count in UP mode or minimum count in DOWN mode while CARRY-IN is low. |
| 8 | VSS | power_in | Negative supply (ground) return terminal for the device. |
| 9 | BINARY/DECADE | input | Mode-select input; a high level selects binary counting and a low level selects BCD-decade counting. |
| 10 | UP/DOWN | input | Count-direction input; a high level makes the counter count up and a low level makes it count down. |
| 11 | Q2 | output | Buffered counter output, bit 2 of the four-stage counter. |
| 12 | JAM 2 | input | Parallel jam data input for bit 2, loaded into the counter when PRESET ENABLE is high. |
| 13 | Q3 | output | Buffered counter output, bit 3 of the four-stage counter. |
| 14 | JAM 3 | input | Parallel jam data input for bit 3, loaded into the counter when PRESET ENABLE is high. |
| 15 | CLOCK | input | Clock input; the counter advances one count at the positive transition of CLOCK when CARRY-IN and PRESET ENABLE are both low. |
| 16 | VDD | power_in | Positive supply voltage terminal, with a recommended operating range of 3 V to 18 V (absolute maximum -0.5 V to +20 V referenced to VSS). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4029BM96 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd4029bm96-etched.step/cd4029bm96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4029bm96.step/cd4029bm96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
67cc8d6987a766ba, retrieved 2026-09-29, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).