CD4029B Up/Down Counter

{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4029",
  "title": "CD4029B Up/Down Counter",
  "brief": "Presettable binary/BCD up/down counter in the 4000B CMOS family, 3 V to 18 V.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "logic",
    "counter",
    "up-down",
    "binary",
    "bcd",
    "4000-series",
    "ti",
    "soic-16"
  ],
  "component": {
    "mpn": "CD4029B",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Counter",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4029b.pdf",
    "parts": {
      "symbol": "cd4029.kicad_sym",
      "footprint": "cd4029.kicad_mod",
      "model_3d": "cd4029-etched.glb",
      "model_3d_plain": "cd4029.glb",
      "model_3d_step": "cd4029-etched.step",
      "model_3d_step_plain": "cd4029.step",
      "lbr": "cd4029.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "PRESET_ENABLE",
        "type": "input",
        "description": "Asynchronous preset enable. When HIGH, the counter is loaded (jammed) with the state present on J1-J4 independently of the clock. When LOW, the counter is free to advance on the clock."
      },
      {
        "number": "2",
        "name": "Q4",
        "type": "output",
        "description": "Buffered counter output bit 4 (MSB). Full-rail CMOS output; IOH/IOL specified up to several mA depending on VDD (see static electrical characteristics)."
      },
      {
        "number": "3",
        "name": "JAM4",
        "type": "input",
        "description": "Parallel jam (preset) data input for bit 4. Loaded into the counter when PRESET ENABLE is HIGH."
      },
      {
        "number": "4",
        "name": "JAM1",
        "type": "input",
        "description": "Parallel jam (preset) data input for bit 1 (LSB). Loaded into the counter when PRESET ENABLE is HIGH."
      },
      {
        "number": "5",
        "name": "CARRY_IN",
        "type": "input",
        "description": "Active-LOW carry input, also functions as the clock enable. Counter advancement (on the positive clock transition) is inhibited when CARRY IN is HIGH; permitted when LOW."
      },
      {
        "number": "6",
        "name": "Q1",
        "type": "output",
        "description": "Buffered counter output bit 1 (LSB). Full-rail CMOS output."
      },
      {
        "number": "7",
        "name": "CARRY_OUT",
        "type": "output",
        "description": "Active-LOW carry output. Normally HIGH; goes LOW when the counter reaches its maximum count in UP mode or the minimum count in DOWN mode while CARRY IN is LOW. Used to ripple-cascade to the next stage's CARRY IN."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference (0 V). Tie to system GND."
      },
      {
        "number": "9",
        "name": "BINARY/DECADE",
        "type": "input",
        "description": "Counter mode select. HIGH selects binary (mod-16) counting; LOW selects BCD decade (mod-10) counting."
      },
      {
        "number": "10",
        "name": "UP/DOWN",
        "type": "input",
        "description": "Direction control. HIGH counts up; LOW counts down."
      },
      {
        "number": "11",
        "name": "Q2",
        "type": "output",
        "description": "Buffered counter output bit 2. Full-rail CMOS output."
      },
      {
        "number": "12",
        "name": "JAM2",
        "type": "input",
        "description": "Parallel jam (preset) data input for bit 2. Loaded into the counter when PRESET ENABLE is HIGH."
      },
      {
        "number": "13",
        "name": "JAM3",
        "type": "input",
        "description": "Parallel jam (preset) data input for bit 3. Loaded into the counter when PRESET ENABLE is HIGH."
      },
      {
        "number": "14",
        "name": "Q3",
        "type": "output",
        "description": "Buffered counter output bit 3. Full-rail CMOS output."
      },
      {
        "number": "15",
        "name": "CLOCK",
        "type": "input",
        "description": "Clock input. The counter advances on the positive transition of CLOCK when CARRY IN is LOW and PRESET ENABLE is LOW. fCL up to 8 MHz typ. at VDD = 10 V."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. Operating range 3 V to 18 V (absolute max -0.5 V to +20 V referenced to VSS)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4029b.pdf",
        "pages": 21,
        "sha256": "01f8e26c0271edc8",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4029",
      "logic_family": "CD4000",
      "function_code": "4029",
      "function_class": null,
      "function_name": null,
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4029.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4029-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c35db14599920f822f23c6ab608afa943d9d716354e8713af475c848997a293b",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "Presettable binary/BCD up/down counter",
      "Logic family": "4000B (CMOS)",
      "Modes": "Binary or BCD, up or down",
      "Features": "Parallel preset, carry in/out, cascadable",
      "Supply voltage": "3 V to 18 V",
      "Operating temperature": "-55 C to 125 C"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "up down counter",
    "binary counter",
    "BCD counter",
    "presettable counter"
  ],
  "discovery_pitch": "A presettable counter that runs binary or BCD, counts up or down, and cascades for wider counts.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4029.kicad_sym",
    "cd4029.kicad_mod",
    "cd4029.glb",
    "cd4029.step",
    "cd4029.lbr",
    "docs/hero.png",
    "docs/cd4029-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4029-etched.step"
  ],
  "variants": [
    {
      "mpn": "CD4029BF3A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4029BE",
      "kind": "unknown"
    },
    {
      "mpn": "CD4029BM",
      "kind": "unknown"
    },
    {
      "mpn": "CD4029BM96",
      "kind": "unknown"
    },
    {
      "mpn": "CD4029BMT",
      "kind": "unknown"
    },
    {
      "mpn": "CD4029BNSR",
      "kind": "unknown"
    },
    {
      "mpn": "CD4029BPW",
      "kind": "unknown"
    },
    {
      "mpn": "CD4029BPWR",
      "kind": "unknown"
    }
  ]
}