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Contents

README

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CD4026BE

Texas Instruments · Counters, Dividers · DIP-16

CD4026BE from Texas Instruments, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLOCK input Schmitt-triggered clock input; the decade counter advances one count on the positive-going clock transition when CLOCK INHIBIT is low.
2 CLOCK INHIBIT input When held high this input blocks counter advancement via the CLOCK line; it can also be used as a negative-edge clock input when the CLOCK line is held high.
3 DISPLAY ENABLE IN input When low, forces the seven decoded outputs (a-g) low regardless of counter state, enabling low-power multiplexed-display operation; outputs go high on selection only when this pin is high.
4 DISPLAY ENABLE OUT output Display-enable output associated with the DISPLAY ENABLE IN gating function, used to cascade display-enable/multiplex control to additional decade stages.
5 CARRY OUT output Completes one cycle every ten CLOCK input cycles and is used to clock the succeeding decade directly in a multi-decade counting chain; not gated by DISPLAY ENABLE and therefore available continuously.
6 f output Decoded 7-segment output f; illuminates the corresponding display segment, going high on selection only when DISPLAY ENABLE IN is high.
7 g output Decoded 7-segment output g; illuminates the corresponding display segment, going high on selection only when DISPLAY ENABLE IN is high.
8 VSS power_in Negative supply/ground reference terminal; all voltages including VDD are referenced to VSS.
9 d output Decoded 7-segment output d; illuminates the corresponding display segment, going high on selection only when DISPLAY ENABLE IN is high.
10 a output Decoded 7-segment output a; illuminates the corresponding display segment, going high on selection only when DISPLAY ENABLE IN is high.
11 e output Decoded 7-segment output e; illuminates the corresponding display segment, going high on selection only when DISPLAY ENABLE IN is high.
12 b output Decoded 7-segment output b; illuminates the corresponding display segment, going high on selection only when DISPLAY ENABLE IN is high.
13 c output Decoded 7-segment output c; illuminates the corresponding display segment, going high on selection only when DISPLAY ENABLE IN is high.
14 UNGATED "C" SEGMENT OUT output Ungated version of the c-segment decoder output that is not gated by DISPLAY ENABLE and is available continuously, required for implementing divide-by-60/divide-by-12 divider functions.
15 RESET input A high level on this pin clears the decade counter to its zero count.
16 VDD power_in Positive supply pin; absolute maximum DC supply-voltage range referenced to VSS is -0.5 V to +20 V, with a recommended operating supply range of 3 V to 18 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD4026BE
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4026be-etched.step / cd4026be-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4026be.step / cd4026be.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 7ac59b14788365ef, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF