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CD4024BPWR

Texas Instruments · Counters, Dividers · TSSOP-14

CD4024BPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 φ input Counter clock input (Schmitt-trigger, unlimited rise/fall time) on which the counter advances one count on each negative transition.
2 RESET input Common reset input; a high level resets the counter to its all-zeros state.
3 Q7 output Buffered output of counter stage 7.
4 Q6 output Buffered output of counter stage 6.
5 Q5 output Buffered output of counter stage 5.
6 Q4 output Buffered output of counter stage 4.
7 VSS power_in Ground (negative supply) terminal; all voltages are referenced to VSS.
8 NC unconnected No connection.
9 Q3 output Buffered output of counter stage 3.
10 NC unconnected No connection.
11 Q2 output Buffered output of counter stage 2.
12 Q1 output Buffered output of counter stage 1.
13 NC unconnected No connection.
14 VDD power_in Positive supply voltage, recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4024BPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4024bpwr-etched.step / cd4024bpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4024bpwr.step / cd4024bpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 7317dfacb7c3e8db, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF