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docs cd4024bm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cd4024bm: viewers · Ray
cd4024bm-etched.fit.json cd4024bm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4024bm-etched.glb cd4024bm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4024bm-etched.step cd4024bm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4024bm.glb Publish 0.1.0 · Ray
cd4024bm.kicad_mod Publish 0.1.0 · Ray
cd4024bm.kicad_sym Publish 0.1.0 · Ray
cd4024bm.lbr Publish 0.1.0 · Ray
cd4024bm.step Publish 0.1.0 · Ray
package.json cd4024bm: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json cd4024bm: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/cd4024bm · Ray

CD4024BM

lingxingic · Counters, Dividers · SOP-14

CD4024BM from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CP input Clock input that advances counter state on each falling edge when MR is low.
2 MR input Master reset active-high input that asynchronously resets all counter outputs to low.
3 O6 output Buffered parallel output of the 6th stage (Q6) of the 7-stage binary ripple counter.
4 O5 output Buffered parallel output of the 5th stage (Q5) of the 7-stage binary ripple counter.
5 O4 output Buffered parallel output of the 4th stage (Q4) of the 7-stage binary ripple counter.
6 O3 output Buffered parallel output of the 3rd stage (Q3) of the 7-stage binary ripple counter.
7 VSS power_in Ground supply voltage (0V reference point).
8 NC unconnected Not connected to internal circuitry.
9 O2 output Buffered parallel output of the 2nd stage (Q2) of the 7-stage binary ripple counter.
10 NC unconnected Not connected to internal circuitry.
11 O1 output Buffered parallel output of the 1st stage (Q1) of the 7-stage binary ripple counter.
12 O0 output Buffered parallel output of the 0th stage (Q0) of the 7-stage binary ripple counter.
13 NC unconnected Not connected to internal circuitry.
14 VDD power_in Positive supply voltage with recommended operating range of 3V to 15V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4024BM
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4024bm-etched.step / cd4024bm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4024bm.step / cd4024bm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (14 pp, sha256 a25e82273215eb79, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF