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CD4023S
Public Made by Adomby adom
GR Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4023S
GR · Logic Gates · SOP-14
CD4023S from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Input A of triple 3-input NAND gate 1; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 2 | B | input | Input B of triple 3-input NAND gate 1; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 3 | D | input | Input D of triple 3-input NAND gate 2; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 4 | E | input | Input E of triple 3-input NAND gate 2; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 5 | F | input | Input F of triple 3-input NAND gate 2; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 6 | K | output | Output K of triple 3-input NAND gate 2 (K = NAND of D, E, F), buffered output. |
| 7 | VSS | power_in | Power ground (negative supply reference) for the device. |
| 8 | J | output | Output J of triple 3-input NAND gate 1 (J = NAND of A, B, C), buffered output. |
| 9 | C | input | Input C of triple 3-input NAND gate 1; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 10 | L | output | Output L of triple 3-input NAND gate 3 (L = NAND of G, H, I), buffered output. |
| 11 | I | input | Input I of triple 3-input NAND gate 3; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 12 | H | input | Input H of triple 3-input NAND gate 3; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 13 | G | input | Input G of triple 3-input NAND gate 3; the datasheet limits input voltage to VSS-0.3 V to VDD+0.5 V. |
| 14 | VDD | power_in | Positive supply; recommended operating range is 3.0 V to 15 V, absolute maximum 15.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | -0.3 | 15.5 | V | 1 | ||
| Input voltage | VIN | -0.3 | V | Printed as -0.3+VSS to VDD+0.5 V; upper bound is not numeric | 1 | ||
| Power dissipation | P! | 500 | mW | 1 | |||
| Operating temperature (absolute maximum rating) | TA | 0 | 70 | ℃ | 1 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 1 | ||
| Lead soldering temperature | TW | 260 | ℃ | 10 s | 1 | ||
| Operating voltage | VDD | 3 | 15 | V | 2 | ||
| Input/output voltage | VIN, Vout | 0 | V | Upper limit printed as VDD | 2 | ||
| Operating temperature | TA | 0 | 60 | ℃ | 2 | ||
| High-level input voltage | VIH | 3.5 | V | /IO/≤1uA; Vo=0.5V; VDD=5V; TA=25℃ | 3 | ||
| High-level input voltage | VIH | 7 | V | /IO/≤1uA; Vo=1V; VDD=10V; TA=25℃ | 3 | ||
| High-level input voltage | VIH | 11 | V | /IO/≤1uA; Vo=1.5V; VDD=15V; TA=25℃ | 3 | ||
| Low-level input voltage | VIL | 1.5 | V | /IO/≤1uA; Vo=4.5V; VDD=5V; TA=25℃ | 3 | ||
| Low-level input voltage | VIL | 3 | V | /IO/≤1uA; Vo=9V; VDD=10V; TA=25℃ | 3 | ||
| Low-level input voltage | VIL | 4 | V | /IO/≤1uA; Vo=13.5V; VDD=15V; TA=25℃ | 3 | ||
| High-level output voltage | VOH | 4.95 | V | /IOUT/<1uA; VDD=5V; TA=25℃ | 3 | ||
| High-level output voltage | VOH | 9.95 | V | /IOUT/<1uA; VDD=10V; TA=25℃ | 3 | ||
| High-level output voltage | VOH | 14.95 | V | /IOUT/<1uA; VDD=15V; TA=25℃ | 3 | ||
| Low-level output voltage | VOL | 0.05 | V | /IOUT/<1uA; VDD=5V; TA=25℃ | 3 | ||
| Input current | IIN | 0.01 | 1 | uA | VIN=VDD or VSS; VDD=15V; TA=25℃ | 3 | |
| High-level output current | IOH | -1.3 | -0.5 | mA | Vo=4.5V; VDD=5V; TA=25℃ | 3 | |
| High-level output current | IOH | -2.8 | -1.3 | mA | Vo=9V; VDD=10V; TA=25℃ | 3 | |
| High-level output current | IOH | -10 | -3.4 | mA | Vo=13.5V; VDD=15V; TA=25℃ | 3 | |
| Low-level output current | IOL | 0.5 | 1.9 | mA | Vo=0.4V; VDD=5V; TA=25℃ | 3 | |
| Low-level output current | IOL | 1.3 | 4.5 | mA | Vo=0.5V; VDD=10V; TA=25℃ | 3 | |
| Low-level output current | IOL | 3.4 | 17 | mA | Vo=1.5V; VDD=15V; TA=25℃ | 3 | |
| Quiescent (operating) current | IDD | 0.25 | uA | VIN=VDD or VSS; VDD=5V; TA=25℃ | 3 | ||
| Quiescent (operating) current | IDD | 0.5 | uA | VIN=VDD or VSS; VDD=10V; TA=25℃ | 3 | ||
| Quiescent (operating) current | IDD | 1 | uA | VIN=VDD or VSS; VDD=15V; TA=25℃ | 3 | ||
| Maximum propagation delay tPHL (inputs to output) | tPHL | 100 | ns | VDD=5V, CL=51pF | 3 | ||
| Maximum propagation delay tPLH (inputs to output) | tPLH | 70 | ns | VDD=5V, CL=51pF | 3 | ||
| Maximum propagation delay tPHL (inputs to output) | tPHL | 50 | ns | VDD=10V, CL=51pF | 3 | ||
| Maximum propagation delay tPLH (inputs to output) | tPLH | 40 | ns | VDD=10V, CL=51pF | 3 | ||
| Maximum propagation delay tPHL (inputs to output) | tPHL | 40 | ns | VDD=15V, CL=51pF | 3 | ||
| Maximum propagation delay tPLH (inputs to output) | tPLH | 28 | ns | VDD=15V, CL=51pF | 3 | ||
| Maximum output fall time (J) | tTHL | 90 | ns | VDD=5V, CL=51pF | 3 | ||
| Maximum output rise time (J) | tTLH | 80 | ns | VDD=5V, CL=51pF | 3 | ||
| Maximum output fall time (J) | tTHL | 60 | ns | VDD=10V, CL=51pF | 3 | ||
| Maximum output rise time (J) | tTLH | 50 | ns | VDD=10V, CL=51pF | 4 | ||
| Maximum output fall time (J) | tTHL | 50 | ns | VDD=15V, CL=51pF | 4 | ||
| Maximum output rise time (J) | tTLH | 40 | ns | VDD=15V, CL=51pF | 4 |
CAD (KiCad official)
- Symbol:
CD4023S - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4023s-etched.step/cd4023s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4023s.step/cd4023s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (7 pp, sha256
2a563c68201537af, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).