# CD4022BNSR

**Texas Instruments** · Counters, Dividers · SO-16

CD4022BNSR from Texas Instruments, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q1 | output | Decoded output "1", goes high only during its time slot for one full clock cycle. |
| 2 | Q0 | output | Decoded output "0", goes high only during its time slot for one full clock cycle. |
| 3 | Q2 | output | Decoded output "2", goes high only during its time slot for one full clock cycle. |
| 4 | Q5 | output | Decoded output "5", goes high only during its time slot for one full clock cycle. |
| 5 | Q6 | output | Decoded output "6", goes high only during its time slot for one full clock cycle. |
| 6 | NC | unconnected | No connection. |
| 7 | Q3 | output | Decoded output "3", goes high only during its time slot for one full clock cycle. |
| 8 | VSS | power_in | Ground (negative supply) pin. |
| 9 | NC | unconnected | No connection. |
| 10 | Q7 | output | Decoded output "7", goes high only during its time slot for one full clock cycle. |
| 11 | Q4 | output | Decoded output "4", goes high only during its time slot for one full clock cycle. |
| 12 | CARRY OUT | output | Carry-out signal completing one cycle every 8 clock input cycles, used to ripple-clock the succeeding device in a counting chain. |
| 13 | CLOCK INHIBIT | input | When high, counter advancement via the clock line is inhibited; counter advances on clock transition when low. |
| 14 | CLOCK | input | Clock input with Schmitt-trigger pulse shaping; counter advances one count on the positive clock transition when CLOCK INHIBIT is low. |
| 15 | RESET | input | A high signal clears the counter to its zero count. |
| 16 | VDD | power_in | Positive supply pin, recommended supply-voltage range 3 V to 18 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-16 |
| Category | Logic |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `CD4022BNSR`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files: `cd4022bnsr-etched.step` / `cd4022bnsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4022bnsr.step` / `cd4022bnsr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4022bnsr.pdf) (24 pp, sha256 `fc892d057db673b9`, retrieved 2026-10-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4022bnsr-datasheet.pdf)