component
CD4020BM
Public Made by Adomby adom
lingxingic Counters, Dividers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
CD4020BM
lingxingic · Counters, Dividers · SOP-16
CD4020BM from lingxingic, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q11 | output | Fully buffered parallel binary counter output Q11 of the 14-stage counter. |
| 2 | Q12 | output | Fully buffered parallel binary counter output Q12 of the 14-stage counter. |
| 3 | Q13 | output | Fully buffered parallel binary counter output Q13, the most significant stage of the 14-stage counter. |
| 4 | Q5 | output | Fully buffered parallel binary counter output Q5 of the 14-stage counter. |
| 5 | Q4 | output | Fully buffered parallel binary counter output Q4 of the 14-stage counter. |
| 6 | Q6 | output | Fully buffered parallel binary counter output Q6 of the 14-stage counter. |
| 7 | Q3 | output | Fully buffered parallel binary counter output Q3 of the 14-stage counter. |
| 8 | VSS | power_in | Ground supply voltage; voltages are referenced to VSS (0 V), with recommended VDD of 3 V to 15V above it. |
| 9 | Q0 | output | Fully buffered parallel binary counter output Q0 of the 14-stage counter. |
| 10 | CP | input | Clock input; the counter advances on the HIGH-to-LOW (negative-going) edge of CP. |
| 11 | MR | input | Master reset input, active HIGH; when HIGH it resets all outputs to LOW and overrides CP. |
| 12 | Q8 | output | Fully buffered parallel binary counter output Q8 of the 14-stage counter. |
| 13 | Q7 | output | Fully buffered parallel binary counter output Q7 of the 14-stage counter. |
| 14 | Q9 | output | Fully buffered parallel binary counter output Q9 of the 14-stage counter. |
| 15 | Q10 | output | Fully buffered parallel binary counter output Q10 of the 14-stage counter. |
| 16 | VDD | power_in | Positive supply voltage; recommended operating range is 3 V to 15 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VDD | -0.5 | 18 | V | 6 | ||
| input voltage (all inputs; printed max VDD+0.5) | VI | -0.5 | V | all inputs | 6 | ||
| DC input current (any one input) | IIK | -10 | 10 | mA | any one input | 6 | |
| storage temperature | Tstg | -65 | 150 | ℃ | 6 | ||
| supply voltage | VDD | 3 | 15 | V | 6 | ||
| ambient temperature | Tamb | -40 | 125 | ℃ | in free air | 6 | |
| HIGH-level input voltage (VDD=5V) | VIH | 3.5 | V | Tamb=-40℃ to +85℃ | 6 | ||
| HIGH-level input voltage (VDD=10V) | VIH | 7 | V | Tamb=-40℃ to +85℃ | 6 | ||
| HIGH-level input voltage (VDD=15V) | VIH | 11 | V | Tamb=-40℃ to +85℃ | 6 | ||
| LOW-level input voltage (VDD=5V) | VIL | 1.5 | V | Tamb=-40℃ to +85℃ | 6 | ||
| LOW-level input voltage (VDD=10V) | VIL | 3 | V | Tamb=-40℃ to +85℃ | 6 | ||
| LOW-level input voltage (VDD=15V) | VIL | 4 | V | Tamb=-40℃ to +85℃ | 6 | ||
| HIGH-level output voltage (VDD=5V) | VOH | 4.95 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 | ||
| HIGH-level output voltage (VDD=10V) | VOH | 9.95 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 | ||
| HIGH-level output voltage (VDD=15V) | VOH | 14.95 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 | ||
| LOW-level output voltage (VDD=5V) | VOL | 0.05 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 | ||
| LOW-level output voltage (VDD=10V) | VOL | 0.05 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 | ||
| LOW-level output voltage (VDD=15V) | VOL | 0.05 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 | ||
| HIGH-level output current (VDD=5V) | IOH | -0.34 | mA | Tamb=-40℃ to +85℃; VO=4.6V | 6 | ||
| HIGH-level output current (VDD=5V) | IOH | -1.3 | mA | Tamb=-40℃ to +85℃; VO=2.5V | 6 | ||
| HIGH-level output current (VDD=10V) | IOH | -0.55 | mA | Tamb=-40℃ to +85℃; VO=9.5V | 6 | ||
| HIGH-level output current (VDD=15V) | IOH | -1.65 | mA | Tamb=-40℃ to +85℃; VO=13.5V | 6 | ||
| LOW-level output current (VDD=5V) | IOL | 0.34 | mA | Tamb=-40℃ to +85℃; VO=0.4V | 6 | ||
| LOW-level output current (VDD=10V) | IOL | 0.46 | mA | Tamb=-40℃ to +85℃; VO=0.5V | 6 | ||
| LOW-level output current (VDD=15V) | IOL | 1.4 | mA | Tamb=-40℃ to +85℃; VO=1.5V | 6 | ||
| input leakage current (VDD=15V) | II | -1 | 1 | uA | Tamb=-40℃ to +85℃; VI=15V or GND | 6 | |
| supply current (VDD=5V) | IDD | 150 | uA | Tamb=-40℃ to +85℃; VI=5V or GND; IO=0A | 6 | ||
| supply current (VDD=10V) | IDD | 300 | uA | Tamb=-40℃ to +85℃; VI=10V or GND; IO=0A | 6 | ||
| supply current (VDD=15V) | IDD | 600 | uA | Tamb=-40℃ to +85℃; VI=15V or GND; IO=0A | 6 | ||
| HIGH to LOW propagation delay CP to Q0 (VDD=5V) | tPHL | 105 | 210 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 | |
| HIGH to LOW propagation delay CP to Q0 (VDD=10V) | tPHL | 45 | 90 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 | |
| HIGH to LOW propagation delay CP to Q0 (VDD=15V) | tPHL | 30 | 65 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 | |
| HIGH to LOW propagation delay Qn to Qn+1 (VDD=5V) | tPHL | 80 | 160 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 | |
| HIGH to LOW propagation delay Qn to Qn+1 (VDD=10V) | tPHL | 30 | 60 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 | |
| HIGH to LOW propagation delay Qn to Qn+1 (VDD=15V) | tPHL | 20 | 40 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 | |
| HIGH to LOW propagation delay MR to Qn (VDD=5V) | tPHL | 180 | 360 | ns | Tamb=-40℃ to +85℃; MR to Qn; see Figure 4 | 8 | |
| HIGH to LOW propagation delay MR to Qn (VDD=10V) | tPHL | 90 | 180 | ns | Tamb=-40℃ to +85℃; MR to Qn; see Figure 4 | 8 | |
| HIGH to LOW propagation delay MR to Qn (VDD=15V) | tPHL | 70 | 140 | ns | Tamb=-40℃ to +85℃; MR to Qn; see Figure 4 | 8 | |
| LOW to HIGH propagation delay CP to Q0 (VDD=5V) | tPLH | 105 | 210 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 | |
| LOW to HIGH propagation delay CP to Q0 (VDD=10V) | tPLH | 50 | 95 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 | |
| LOW to HIGH propagation delay CP to Q0 (VDD=15V) | tPLH | 35 | 70 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 | |
| LOW to HIGH propagation delay Qn to Qn+1 (VDD=5V) | tPLH | 70 | 140 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 | |
| LOW to HIGH propagation delay Qn to Qn+1 (VDD=10V) | tPLH | 25 | 50 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 | |
| LOW to HIGH propagation delay Qn to Qn+1 (VDD=15V) | tPLH | 20 | 40 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 | |
| transition time (VDD=5V) | tt | 60 | 120 | ns | Tamb=-40℃ to +85℃; see Figure 4 | 8 | |
| transition time (VDD=10V) | tt | 30 | 60 | ns | Tamb=-40℃ to +85℃; see Figure 4 | 8 | |
| transition time (VDD=15V) | tt | 20 | 40 | ns | Tamb=-40℃ to +85℃; see Figure 4 | 8 | |
| pulse width CP=HIGH minimum width (VDD=5V) | tW | 50 | 25 | ns | Tamb=-40℃ to +85℃; CP=HIGH; minimum width; see Figure 4 | 8 | |
| pulse width CP=HIGH minimum width (VDD=10V) | tW | 25 | 15 | ns | Tamb=-40℃ to +85℃; CP=HIGH; minimum width; see Figure 4 | 8 | |
| pulse width CP=HIGH minimum width (VDD=15V) | tW | 20 | 10 | ns | Tamb=-40℃ to +85℃; CP=HIGH; minimum width; see Figure 4 | 8 | |
| pulse width MR=HIGH minimum width (VDD=5V) | tW | 130 | 65 | ns | Tamb=-40℃ to +85℃; MR=HIGH; minimum width; see Figure 4 | 8 | |
| pulse width MR=HIGH minimum width (VDD=10V) | tW | 95 | 50 | ns | Tamb=-40℃ to +85℃; MR=HIGH; minimum width; see Figure 4 | 8 | |
| pulse width MR=HIGH minimum width (VDD=15V) | tW | 90 | 45 | ns | Tamb=-40℃ to +85℃; MR=HIGH; minimum width; see Figure 4 | 8 | |
| recovery time (VDD=5V) | trec | 115 | 60 | ns | Tamb=-40℃ to +85℃; MR input; see Figure 4 | 8 | |
| recovery time (VDD=10V) | trec | 65 | 35 | ns | Tamb=-40℃ to +85℃; MR input; see Figure 4 | 8 | |
| recovery time (VDD=15V) | trec | 55 | 25 | ns | Tamb=-40℃ to +85℃; MR input; see Figure 4 | 8 | |
| maximum frequency (VDD=5V) | fmax | 5 | 10 | MHz | Tamb=-40℃ to +85℃; see Figure 4 | 8 | |
| maximum frequency (VDD=10V) | fmax | 13 | 25 | MHz | Tamb=-40℃ to +85℃; see Figure 4 | 8 | |
| maximum frequency (VDD=15V) | fmax | 18 | 35 | MHz | Tamb=-40℃ to +85℃; see Figure 4 | 8 |
CAD (KiCad official)
- Symbol:
CD4020BM - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4020bm-etched.step/cd4020bm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4020bm.step/cd4020bm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (14 pp, sha256
ead288dd45e81231, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD4020BM
**lingxingic** · Counters, Dividers · SOP-16
CD4020BM from lingxingic, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q11 | output | Fully buffered parallel binary counter output Q11 of the 14-stage counter. |
| 2 | Q12 | output | Fully buffered parallel binary counter output Q12 of the 14-stage counter. |
| 3 | Q13 | output | Fully buffered parallel binary counter output Q13, the most significant stage of the 14-stage counter. |
| 4 | Q5 | output | Fully buffered parallel binary counter output Q5 of the 14-stage counter. |
| 5 | Q4 | output | Fully buffered parallel binary counter output Q4 of the 14-stage counter. |
| 6 | Q6 | output | Fully buffered parallel binary counter output Q6 of the 14-stage counter. |
| 7 | Q3 | output | Fully buffered parallel binary counter output Q3 of the 14-stage counter. |
| 8 | VSS | power_in | Ground supply voltage; voltages are referenced to VSS (0 V), with recommended VDD of 3 V to 15V above it. |
| 9 | Q0 | output | Fully buffered parallel binary counter output Q0 of the 14-stage counter. |
| 10 | CP | input | Clock input; the counter advances on the HIGH-to-LOW (negative-going) edge of CP. |
| 11 | MR | input | Master reset input, active HIGH; when HIGH it resets all outputs to LOW and overrides CP. |
| 12 | Q8 | output | Fully buffered parallel binary counter output Q8 of the 14-stage counter. |
| 13 | Q7 | output | Fully buffered parallel binary counter output Q7 of the 14-stage counter. |
| 14 | Q9 | output | Fully buffered parallel binary counter output Q9 of the 14-stage counter. |
| 15 | Q10 | output | Fully buffered parallel binary counter output Q10 of the 14-stage counter. |
| 16 | VDD | power_in | Positive supply voltage; recommended operating range is 3 V to 15 V referenced to VSS. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VDD | -0.5 | | 18 | V | | 6 |
| input voltage (all inputs; printed max VDD+0.5) | VI | -0.5 | | | V | all inputs | 6 |
| DC input current (any one input) | IIK | -10 | | 10 | mA | any one input | 6 |
| storage temperature | Tstg | -65 | | 150 | ℃ | | 6 |
| supply voltage | VDD | 3 | | 15 | V | | 6 |
| ambient temperature | Tamb | -40 | | 125 | ℃ | in free air | 6 |
| HIGH-level input voltage (VDD=5V) | VIH | 3.5 | | | V | Tamb=-40℃ to +85℃ | 6 |
| HIGH-level input voltage (VDD=10V) | VIH | 7 | | | V | Tamb=-40℃ to +85℃ | 6 |
| HIGH-level input voltage (VDD=15V) | VIH | 11 | | | V | Tamb=-40℃ to +85℃ | 6 |
| LOW-level input voltage (VDD=5V) | VIL | | | 1.5 | V | Tamb=-40℃ to +85℃ | 6 |
| LOW-level input voltage (VDD=10V) | VIL | | | 3 | V | Tamb=-40℃ to +85℃ | 6 |
| LOW-level input voltage (VDD=15V) | VIL | | | 4 | V | Tamb=-40℃ to +85℃ | 6 |
| HIGH-level output voltage (VDD=5V) | VOH | 4.95 | | | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 |
| HIGH-level output voltage (VDD=10V) | VOH | 9.95 | | | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 |
| HIGH-level output voltage (VDD=15V) | VOH | 14.95 | | | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 |
| LOW-level output voltage (VDD=5V) | VOL | | | 0.05 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 |
| LOW-level output voltage (VDD=10V) | VOL | | | 0.05 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 |
| LOW-level output voltage (VDD=15V) | VOL | | | 0.05 | V | Tamb=-40℃ to +85℃; /IO/<1uA | 6 |
| HIGH-level output current (VDD=5V) | IOH | | | -0.34 | mA | Tamb=-40℃ to +85℃; VO=4.6V | 6 |
| HIGH-level output current (VDD=5V) | IOH | | | -1.3 | mA | Tamb=-40℃ to +85℃; VO=2.5V | 6 |
| HIGH-level output current (VDD=10V) | IOH | | | -0.55 | mA | Tamb=-40℃ to +85℃; VO=9.5V | 6 |
| HIGH-level output current (VDD=15V) | IOH | | | -1.65 | mA | Tamb=-40℃ to +85℃; VO=13.5V | 6 |
| LOW-level output current (VDD=5V) | IOL | 0.34 | | | mA | Tamb=-40℃ to +85℃; VO=0.4V | 6 |
| LOW-level output current (VDD=10V) | IOL | 0.46 | | | mA | Tamb=-40℃ to +85℃; VO=0.5V | 6 |
| LOW-level output current (VDD=15V) | IOL | 1.4 | | | mA | Tamb=-40℃ to +85℃; VO=1.5V | 6 |
| input leakage current (VDD=15V) | II | -1 | | 1 | uA | Tamb=-40℃ to +85℃; VI=15V or GND | 6 |
| supply current (VDD=5V) | IDD | | | 150 | uA | Tamb=-40℃ to +85℃; VI=5V or GND; IO=0A | 6 |
| supply current (VDD=10V) | IDD | | | 300 | uA | Tamb=-40℃ to +85℃; VI=10V or GND; IO=0A | 6 |
| supply current (VDD=15V) | IDD | | | 600 | uA | Tamb=-40℃ to +85℃; VI=15V or GND; IO=0A | 6 |
| HIGH to LOW propagation delay CP to Q0 (VDD=5V) | tPHL | | 105 | 210 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 |
| HIGH to LOW propagation delay CP to Q0 (VDD=10V) | tPHL | | 45 | 90 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 |
| HIGH to LOW propagation delay CP to Q0 (VDD=15V) | tPHL | | 30 | 65 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 |
| HIGH to LOW propagation delay Qn to Qn+1 (VDD=5V) | tPHL | | 80 | 160 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 |
| HIGH to LOW propagation delay Qn to Qn+1 (VDD=10V) | tPHL | | 30 | 60 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 |
| HIGH to LOW propagation delay Qn to Qn+1 (VDD=15V) | tPHL | | 20 | 40 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 |
| HIGH to LOW propagation delay MR to Qn (VDD=5V) | tPHL | | 180 | 360 | ns | Tamb=-40℃ to +85℃; MR to Qn; see Figure 4 | 8 |
| HIGH to LOW propagation delay MR to Qn (VDD=10V) | tPHL | | 90 | 180 | ns | Tamb=-40℃ to +85℃; MR to Qn; see Figure 4 | 8 |
| HIGH to LOW propagation delay MR to Qn (VDD=15V) | tPHL | | 70 | 140 | ns | Tamb=-40℃ to +85℃; MR to Qn; see Figure 4 | 8 |
| LOW to HIGH propagation delay CP to Q0 (VDD=5V) | tPLH | | 105 | 210 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 |
| LOW to HIGH propagation delay CP to Q0 (VDD=10V) | tPLH | | 50 | 95 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 |
| LOW to HIGH propagation delay CP to Q0 (VDD=15V) | tPLH | | 35 | 70 | ns | Tamb=-40℃ to +85℃; CP to Q0; see Figure 4 | 8 |
| LOW to HIGH propagation delay Qn to Qn+1 (VDD=5V) | tPLH | | 70 | 140 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 |
| LOW to HIGH propagation delay Qn to Qn+1 (VDD=10V) | tPLH | | 25 | 50 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 |
| LOW to HIGH propagation delay Qn to Qn+1 (VDD=15V) | tPLH | | 20 | 40 | ns | Tamb=-40℃ to +85℃; Qn to Qn+1 | 8 |
| transition time (VDD=5V) | tt | | 60 | 120 | ns | Tamb=-40℃ to +85℃; see Figure 4 | 8 |
| transition time (VDD=10V) | tt | | 30 | 60 | ns | Tamb=-40℃ to +85℃; see Figure 4 | 8 |
| transition time (VDD=15V) | tt | | 20 | 40 | ns | Tamb=-40℃ to +85℃; see Figure 4 | 8 |
| pulse width CP=HIGH minimum width (VDD=5V) | tW | 50 | 25 | | ns | Tamb=-40℃ to +85℃; CP=HIGH; minimum width; see Figure 4 | 8 |
| pulse width CP=HIGH minimum width (VDD=10V) | tW | 25 | 15 | | ns | Tamb=-40℃ to +85℃; CP=HIGH; minimum width; see Figure 4 | 8 |
| pulse width CP=HIGH minimum width (VDD=15V) | tW | 20 | 10 | | ns | Tamb=-40℃ to +85℃; CP=HIGH; minimum width; see Figure 4 | 8 |
| pulse width MR=HIGH minimum width (VDD=5V) | tW | 130 | 65 | | ns | Tamb=-40℃ to +85℃; MR=HIGH; minimum width; see Figure 4 | 8 |
| pulse width MR=HIGH minimum width (VDD=10V) | tW | 95 | 50 | | ns | Tamb=-40℃ to +85℃; MR=HIGH; minimum width; see Figure 4 | 8 |
| pulse width MR=HIGH minimum width (VDD=15V) | tW | 90 | 45 | | ns | Tamb=-40℃ to +85℃; MR=HIGH; minimum width; see Figure 4 | 8 |
| recovery time (VDD=5V) | trec | 115 | 60 | | ns | Tamb=-40℃ to +85℃; MR input; see Figure 4 | 8 |
| recovery time (VDD=10V) | trec | 65 | 35 | | ns | Tamb=-40℃ to +85℃; MR input; see Figure 4 | 8 |
| recovery time (VDD=15V) | trec | 55 | 25 | | ns | Tamb=-40℃ to +85℃; MR input; see Figure 4 | 8 |
| maximum frequency (VDD=5V) | fmax | 5 | 10 | | MHz | Tamb=-40℃ to +85℃; see Figure 4 | 8 |
| maximum frequency (VDD=10V) | fmax | 13 | 25 | | MHz | Tamb=-40℃ to +85℃; see Figure 4 | 8 |
| maximum frequency (VDD=15V) | fmax | 18 | 35 | | MHz | Tamb=-40℃ to +85℃; see Figure 4 | 8 |
## CAD (KiCad official)
- Symbol: `CD4020BM`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `cd4020bm-etched.step` / `cd4020bm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4020bm.step` / `cd4020bm.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [lingxingic datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603388815645941760) (14 pp, sha256 `ead288dd45e81231`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd4020bm-datasheet.pdf)