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CD4020BD

Public Made by Adom

by adom

Sungine Counters, Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogiccd4020bdfactory-2.0.0extractor-text

Verified CD4020BD

by Ray · last 9 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

9 Nov 2026RayPublished by the parts factory: tier lcsc, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CD4020BD · DIP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • •datasheet (warn): 1/16 pin names appear NOWHERE in the datasheet text: ['10:Φ1@p1']
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: DIP-16_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-qtlgrgir/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ cd4020bd.kicad_sym✓ cd4020bd.kicad_mod✓ cd4020bd.step
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CD4020BD

Sungine · Counters, Dividers · DIP-16

CD4020BD from Sungine, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q12 output Buffered counter output Q12 of the ripple-carry binary counter.
2 Q13 output Buffered counter output Q13 of the ripple-carry binary counter.
3 Q14 output Buffered counter output Q14 of the ripple-carry binary counter.
4 Q6 output Buffered counter output Q6 of the ripple-carry binary counter.
5 Q5 output Buffered counter output Q5 of the ripple-carry binary counter.
6 Q7 output Buffered counter output Q7 of the ripple-carry binary counter.
7 Q4 output Buffered counter output Q4 of the ripple-carry binary counter.
8 VSS power_in Ground reference for the supply; VDD is specified relative to VSS.
9 Q1 output Buffered counter output Q1 of the ripple-carry binary counter.
10 Φ1 input Clock input with Schmitt trigger, so there are no special rise/fall time requirements on the clock edges; the counter advances on each negative-going input pulse edge.
11 RESET input Common reset input for all counter stages; a high level sets every bit to the all-zero state.
12 Q9 output Buffered counter output Q9 of the ripple-carry binary counter.
13 Q8 output Buffered counter output Q8 of the ripple-carry binary counter.
14 Q10 output Buffered counter output Q10 of the ripple-carry binary counter.
15 Q11 output Buffered counter output Q11 of the ripple-carry binary counter.
16 VDD power_in Positive supply, recommended operating range 3 V to 18 V, absolute maximum -0.5 V to +20 V relative to VSS.

Key specifications

Parameter Value
Manufacturer Sungine
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD -0.5 20 V voltage reference VSS 4
Input voltage range VIN -0.5 V VDD+0.5 upper limit as printed 4
DC input current IIN -10 10 mA 4
Power dissipation PD 500 mW TA=-55~100℃ 5
Power dissipation PD 200 mW TA=-100~125℃ as printed 5
Power dissipation per output 100 mW each output 5
Operating temperature range TA -55 125 ℃ 5
Storage temperature range Tstg -65 150 ℃ package operating temperature range as printed 5
Soldering temperature (spot) TL 265 ℃ 5
Supply voltage VDD 3 18 V 9
Maximum input pulse frequency tΦ 3.5 MHz VDD=5V 9
Maximum input pulse frequency tΦ 8 MHz VDD=10V 9
Maximum input pulse frequency tΦ 12 MHz VDD=15V 9
Input pulse width tW 140 ns VDD=5V 9
Input pulse width tW 60 ns VDD=10V 9
Input pulse width tW 40 ns VDD=15V 9
Reset pulse width tW 200 ns VDD=5V 9
Reset pulse width tW 80 ns VDD=10V 9
Reset pulse width tW 60 ns VDD=15V 9
Reset removal time tREM 350 ns VDD=5V 9
Reset removal time tREM 150 ns VDD=10V 9
Reset removal time tREM 100 ns VDD=15V 9
Quiescent device current IDD 0.04 5 µA VDD=5V, VIN=0/5V, TA=+25℃ 5
Quiescent device current IDD 0.04 10 µA VDD=10V, VIN=0/10V, TA=+25℃ 5
Quiescent device current IDD 0.04 20 µA VDD=15V, VIN=0/15V, TA=+25℃ 5
Quiescent device current IDD 0.08 100 µA VDD=20V, VIN=0/20V, TA=+25℃ 5
Minimum output low current IOL 0.51 1 mA VO=0.4V, VDD=5V, VIN=0/5V, TA=+25℃ 5
Minimum output low current IOL 1.3 2.8 mA VO=0.5V, VDD=10V, VIN=0/10V, TA=+25℃ 5
Minimum output low current IOL 3.4 6.8 mA VO=1.5V, VDD=15V, VIN=0/15V, TA=+25℃ 5
Minimum output high current IOH -0.51 -1 mA VO=4.6V, VDD=5V, VIN=0/5V, TA=+25℃ 5
Minimum output high current IOH -1.6 -3.2 mA VO=2.5V, VDD=5V, VIN=0/5V, TA=+25℃ 5
Minimum output high current IOH -1.3 -2.6 mA VO=9.5V, VDD=10V, VIN=0/10V, TA=+25℃ 5
Minimum output high current IOH -3.4 -6.8 mA VO=13.5V, VDD=15V, VIN=0/15V, TA=+25℃ 5
Maximum output low voltage VOL 0 0.05 V VDD=5V, VIN=0/5V 5
Minimum output high voltage VOH 4.95 5 V VDD=5V, VIN=0/5V 5
Minimum output high voltage VOH 9.95 10 V VDD=10V, VIN=0/10V 5
Minimum output high voltage VOH 14.95 15 V VDD=15V, VIN=0/15V 5
Maximum input low voltage VIL 1.5 V VDD=5V, VO=0.5V/4.5V 5
Maximum input low voltage VIL 3 V VDD=10V, VO=1V/9V 6
Maximum input low voltage VIL 4 V VDD=15V, VO=1.5V/13.5V 6
Minimum input high voltage VIH 3.5 V VDD=5V, VO=0.5V/4.5V 6
Minimum input high voltage VIH 7 V VDD=10V, VO=1V/9V 6
Minimum input high voltage VIH 11 V VDD=15V, VO=1.5V/13.5V 6
Maximum input current IIN -0.1 0.1 µA VDD=18V, VIN=0/18V, TA=+25℃ 6
Propagation delay Φ to Q1 tPHL/tPLH 180 360 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=5V 6
Propagation delay Φ to Q1 tPHL/tPLH 80 160 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=10V 6
Propagation delay Φ to Q1 tPHL/tPLH 65 130 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=15V 6
Propagation delay Qn to Qn+1 tTHL/tTLH 100 330 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=5V 6
Propagation delay Qn to Qn+1 tTHL/tTLH 40 80 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=10V 6
Propagation delay Qn to Qn+1 tTHL/tTLH 30 60 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=15V 6
Output transition time tTHL/tTLH 100 200 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=5V 6
Output transition time tTHL/tTLH 50 100 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=10V 6
Output transition time tTHL/tTLH 40 80 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=15V 6
Maximum input pulse frequency fΦ 3.5 7 MHz Ta=25℃, VDD=5V 6
Maximum input pulse frequency fΦ 8 16 MHz Ta=25℃, VDD=10V 6
Maximum input pulse frequency fΦ 12 24 MHz Ta=25℃, VDD=15V 6
Input capacitance CI 5 7.5 pF any input 6
Reset propagation delay tPHL 140 280 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=5V 6
Reset propagation delay tPHL 60 120 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=10V 6
Reset propagation delay tPHL 50 100 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=15V 6
Minimum reset pulse width tW 100 200 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=5V 6
Minimum reset pulse width tW 40 80 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=10V 6
Minimum reset pulse width tW 30 60 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=15V 6
Reset removal time tREM 175 360 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=5V 6
Reset removal time tREM 75 150 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=10V 7
Reset removal time tREM 50 100 ns Ta=25℃, Tr/Tf=20ns, CL=50pF, RL=200KΩ, VDD=15V 7

CAD (KiCad official)

  • Symbol: CD4020BD
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4020bd-etched.step / cd4020bd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4020bd.step / cd4020bd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Sungine datasheet (10 pp, sha256 6b932d8829dbf3ba, retrieved 2026-11-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF