main
Ray cd4019bpwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… b22da46 15d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4019bpwr",
  "title": "CD4019BPWR",
  "brief": "Texas Instruments Logic Gates, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "cd4019bpwr"
  ],
  "component": {
    "mpn": "CD4019BPWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4019b.pdf",
    "parts": {
      "symbol": "cd4019bpwr.kicad_sym",
      "footprint": "cd4019bpwr.kicad_mod",
      "model_3d": "cd4019bpwr-etched.glb",
      "model_3d_plain": "cd4019bpwr.glb",
      "model_3d_step": "cd4019bpwr-etched.step",
      "model_3d_step_plain": "cd4019bpwr.step",
      "lbr": "cd4019bpwr.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "B4",
        "type": "input",
        "description": "Channel-B data input to the 4th AND/OR select gate. Combined with Kb, contributes the B4·Kb term to output D4."
      },
      {
        "number": "2",
        "name": "A3",
        "type": "input",
        "description": "Channel-A data input to the 3rd AND/OR select gate. Combined with Ka, contributes the A3·Ka term to output D3."
      },
      {
        "number": "3",
        "name": "B3",
        "type": "input",
        "description": "Channel-B data input to the 3rd AND/OR select gate. Combined with Kb, contributes the B3·Kb term to output D3."
      },
      {
        "number": "4",
        "name": "A2",
        "type": "input",
        "description": "Channel-A data input to the 2nd AND/OR select gate. Combined with Ka, contributes the A2·Ka term to output D2."
      },
      {
        "number": "5",
        "name": "B2",
        "type": "input",
        "description": "Channel-B data input to the 2nd AND/OR select gate. Combined with Kb, contributes the B2·Kb term to output D2."
      },
      {
        "number": "6",
        "name": "A1",
        "type": "input",
        "description": "Channel-A data input to the 1st AND/OR select gate. Combined with Ka, contributes the A1·Ka term to output D1."
      },
      {
        "number": "7",
        "name": "B1",
        "type": "input",
        "description": "Channel-B data input to the 1st AND/OR select gate. Combined with Kb, contributes the B1·Kb term to output D1."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference. Operating supply (VDD − VSS) range is 3 V to 18 V; absolute maximum 20 V."
      },
      {
        "number": "9",
        "name": "Ka",
        "type": "input",
        "description": "Channel-A select control bit. When Ka = 1 the A-channel AND terms (An·Ka) propagate to the Dn outputs; when Ka = Kb = 1 the outputs form the OR (A+B) function."
      },
      {
        "number": "10",
        "name": "D1",
        "type": "output",
        "description": "Select-gate 1 output. D1 = A1·Ka + B1·Kb."
      },
      {
        "number": "11",
        "name": "D2",
        "type": "output",
        "description": "Select-gate 2 output. D2 = A2·Ka + B2·Kb."
      },
      {
        "number": "12",
        "name": "D3",
        "type": "output",
        "description": "Select-gate 3 output. D3 = A3·Ka + B3·Kb."
      },
      {
        "number": "13",
        "name": "D4",
        "type": "output",
        "description": "Select-gate 4 output. D4 = A4·Ka + B4·Kb."
      },
      {
        "number": "14",
        "name": "Kb",
        "type": "input",
        "description": "Channel-B select control bit. When Kb = 1 the B-channel AND terms (Bn·Kb) propagate to the Dn outputs; when Ka = Kb = 1 the outputs form the OR (A+B) function."
      },
      {
        "number": "15",
        "name": "A4",
        "type": "input",
        "description": "Channel-A data input to the 4th AND/OR select gate. Combined with Ka, contributes the A4·Ka term to output D4."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. Operating range 3 V to 18 V referred to VSS; absolute maximum 20 V. Datasheet gives parametric ratings at 5 V, 10 V and 15 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4019b.pdf",
        "pages": null,
        "sha256": "88db828df55fcfeb",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4019",
      "logic_family": "CD4000",
      "function_code": "4019",
      "function_class": null,
      "function_name": null,
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4019bpwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4019bpwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "028186765fde98b299a0a2d171f67e5a19cca86cd195641b536e949a06f9931c",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "variants": [
    {
      "mpn": "CD4019BPWR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRE",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWREE4",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRF",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRF3A",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRJM38510/05352BEA",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRM38510/05352BEA",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRM",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRM96",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRMT",
      "kind": "packaging"
    },
    {
      "mpn": "CD4019BPWRNSR",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4019bpwr"
  ],
  "discovery_pitch": "CD4019BPWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4019bpwr.kicad_sym",
    "cd4019bpwr.kicad_mod",
    "cd4019bpwr.glb",
    "cd4019bpwr.step",
    "cd4019bpwr.lbr",
    "docs/hero.png",
    "docs/cd4019bpwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T18:39:59.424Z"
}