CD40193BE

{
  "schema_version": 1,
  "type": "component",
  "slug": "cd40193be",
  "title": "CD40193BE",
  "brief": "lingxingic Counters, Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
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    "logic",
    "cd40193be",
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  "component": {
    "mpn": "CD40193BE",
    "manufacturer": "lingxingic",
    "package": "DIP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Counters, Dividers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603322857905156096",
    "parts": {
      "symbol": "cd40193be.kicad_sym",
      "footprint": "cd40193be.kicad_mod",
      "model_3d": "cd40193be-hero.glb",
      "model_3d_plain": "cd40193be-etched.glb",
      "model_3d_step": "cd40193be-etched.step",
      "model_3d_step_plain": "cd40193be.step",
      "lbr": "cd40193be.lbr"
    },
    "distributor_links": {
      "lcsc": "C22397210",
      "digikey": "296-3510-5-ND",
      "mouser": "595-CD40193BE"
    },
    "distributor_check": {
      "checked_at": "2026-10-15T11:42:39Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-3510-5-ND",
        "status": "found"
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        "pn": "595-CD40193BE",
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    },
    "pins": [
      {
        "number": "1",
        "name": "D1",
        "type": "input",
        "description": "Parallel data input D1, loaded into the counter when PL is LOW."
      },
      {
        "number": "2",
        "name": "Q1",
        "type": "output",
        "description": "Buffered counter output Q1."
      },
      {
        "number": "3",
        "name": "Q0",
        "type": "output",
        "description": "Buffered counter output Q0."
      },
      {
        "number": "4",
        "name": "CPD",
        "type": "input",
        "description": "Count-down clock pulse input, active on a LOW-to-HIGH edge (edge-triggered)."
      },
      {
        "number": "5",
        "name": "CPU",
        "type": "input",
        "description": "Count-up clock pulse input, active on a LOW-to-HIGH edge (edge-triggered)."
      },
      {
        "number": "6",
        "name": "Q2",
        "type": "output",
        "description": "Buffered counter output Q2."
      },
      {
        "number": "7",
        "name": "Q3",
        "type": "output",
        "description": "Buffered counter output Q3."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground supply voltage; voltages are referenced to VSS (0 V)."
      },
      {
        "number": "9",
        "name": "D3",
        "type": "input",
        "description": "Parallel data input D3, loaded into the counter when PL is LOW."
      },
      {
        "number": "10",
        "name": "D2",
        "type": "input",
        "description": "Parallel data input D2, loaded into the counter when PL is LOW."
      },
      {
        "number": "11",
        "name": "PL",
        "type": "input",
        "description": "Parallel load input, active LOW; it loads the D0 to D3 data into the counter."
      },
      {
        "number": "12",
        "name": "TCU",
        "type": "output",
        "description": "Buffered terminal count-up (carry) output, active LOW."
      },
      {
        "number": "13",
        "name": "TCD",
        "type": "output",
        "description": "Buffered terminal count-down (borrow) output, active LOW."
      },
      {
        "number": "14",
        "name": "MR",
        "type": "input",
        "description": "Master reset input, asynchronous; a HIGH level resets the counter."
      },
      {
        "number": "15",
        "name": "D0",
        "type": "input",
        "description": "Parallel data input D0, loaded into the counter when PL is LOW."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply voltage pin; the recommended operating supply range is 3 V to 15 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
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        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet lists CD40193BE(LX) in DIP16 packing (marking CD40193BE), which matches the requested ; The pin configuration diagram on page 4 is garbled in text extraction. Pin numbers and names were ta; Pin types for D0-D3, CPU, CPD, PL, MR were assigned as input and Q0-Q3, TCU, TCD as output based on "
        ],
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        "at": "2026-10-15T11:42:22"
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        "source_tier": "lcsc"
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      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
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        "refuses_to_fabricate": true
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "lingxingic",
      "Package": "DIP-16",
      "Category": "Logic",
      "Pins": "16"
    },
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