component
CD4017CN
Public Made by Adomby adom
HGSEMI Counters / Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
CD4017CN
HGSEMI · Counters / Dividers · DIP-16
CD4017CN from HGSEMI, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q5 | output | Decoded Johnson counter output Q5, active when the counter is in its sixth state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 2 | Q1 | output | Decoded Johnson counter output Q1, active when the counter is in its second state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 3 | Q0 | output | Decoded Johnson counter output Q0, goes high at reset and in the first counter state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 4 | Q2 | output | Decoded Johnson counter output Q2, active when the counter is in its third state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 5 | Q6 | output | Decoded Johnson counter output Q6, active when the counter is in its seventh state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 6 | Q7 | output | Decoded Johnson counter output Q7, active when the counter is in its eighth state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 7 | Q3 | output | Decoded Johnson counter output Q3, active when the counter is in its fourth state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 8 | VSS | power_in | Ground reference pin, 0 V in the DC electrical characteristics test conditions. |
| 9 | Q8 | output | Decoded Johnson counter output Q8, active when the counter is in its ninth state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 10 | Q4 | output | Decoded Johnson counter output Q4, active when the counter is in its fifth state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 11 | Q9 | output | Decoded Johnson counter output Q9, active when the counter is in its tenth state; the datasheet gives no electrical limits for individual outputs beyond the absolute maximum output current of ±10 mA for input/output current. |
| 12 | CARRY OUT | output | Carry output that goes high to clock a following counter stage, with propagation delay of 170 ns typical at VDD=15 V on the carry path shown in the AC characteristics. |
| 13 | CLOCK INHIBIT | input | Clock inhibit input: when low the counter advances on the rising edge of CLOCK, and when high counting is disabled; the datasheet gives a minimum clock inhibit setup time tS of 230 ns at VDD=5 V. |
| 14 | CLOCK | input | Clock input with Schmitt-trigger pulse shaping, so input rise and fall times are unrestricted; maximum clock input frequency is 2.5 MHz at VDD=5 V, 5 MHz at VDD=10 V and 5.5 MHz at VDD=15 V. |
| 15 | RESET | input | Reset input: when high it clears the counter so that Q0 and CARRY OUT go high and Q0 through Q9 go low; the minimum reset pulse width is 260 ns at VDD=5 V. |
| 16 | VDD | power_in | Positive supply pin; the recommended operating supply range is 3 V to 15 V and the absolute maximum is -0.5 V to 15 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | -0.5 | 15 | V | 5 | ||
| Input voltage | VI | -0.5 | V | 5 | |||
| Input/output current | ±I | -10 | 10 | mA | 5 | ||
| Power dissipation | PD | 500 | mW | Tamb = -40 to +85℃ | 5 | ||
| Output power | P | 100 | mW | 5 | |||
| Operating ambient temperature | Tamb | -40 | 85 | ℃ | 5 | ||
| Storage temperature | Tstg | -65 | 150 | ℃ | 5 | ||
| Soldering temperature | TL | 260 | ℃ | 焊接 10 秒 | 5 | ||
| Operating voltage | 3 | 15 | V | 6 | |||
| Clock inhibit setup time | TS | 230 | ns | VDD=5V | 6 | ||
| Clock inhibit setup time | TS | 100 | ns | VDD=10V | 6 | ||
| Clock inhibit setup time | TS | 70 | ns | VDD=15V | 6 | ||
| Pulse width | TW | 200 | ns | VDD=5V | 6 | ||
| Pulse width | TW | 90 | ns | VDD=10V | 6 | ||
| Pulse width | TW | 60 | ns | VDD=15V | 6 | ||
| Clock input frequency | fCL | 2.5 | MHz | VDD=5V | 6 | ||
| Clock input frequency | fCL | 5 | MHz | VDD=10V | 6 | ||
| Clock input frequency | fCL | 5.5 | MHz | VDD=15V | 6 | ||
| Reset pulse width | tRW | 260 | ns | VDD=5V | 6 | ||
| Reset pulse width | tRW | 110 | ns | VDD=10V | 6 | ||
| Reset pulse width | tRW | 60 | ns | VDD=15V | 6 | ||
| Reset clear time | trem | 400 | ns | VDD=5V | 6 | ||
| Reset clear time | trem | 280 | ns | VDD=10V | 6 | ||
| Reset clear time | trem | 150 | ns | VDD=15V | 6 | ||
| Quiescent current | IDD | 0.04 | 5 | µA | VI=VSS或VDD; IO=0; VDD=5V; Tamb=25℃ | 8 | |
| Quiescent current | IDD | 0.04 | 10 | µA | VI=VSS或VDD; IO=0; VDD=10V; Tamb=25℃ | 8 | |
| Quiescent current | IDD | 0.04 | 20 | µA | VI=VSS或VDD; IO=0; VDD=15V; Tamb=25℃ | 8 | |
| Output low voltage | VOL | 0 | 0.05 | V | VI=VSS或VDD, /IO/<1µA; VDD=5V; Tamb=25℃ | 8 | |
| Output high voltage | VOH | 4.95 | 5 | V | VI=VSS或VDD, /IO/<1µA; VDD=5V; Tamb=25℃ | 8 | |
| Output high voltage | VOH | 9.95 | 10 | V | VI=VSS或VDD, /IO/<1µA; VDD=10V; Tamb=25℃ | 8 | |
| Output high voltage | VOH | 14.95 | 15 | V | VI=VSS或VDD, /IO/<1µA; VDD=15V; Tamb=25℃ | 8 | |
| Input low voltage | VIL | 1.5 | V | VO=0.5V或4.5V, /IO/<1µA; VDD=5V; Tamb=25℃ | 8 | ||
| Input low voltage | VIL | 3 | V | VO=1.0V或9.0V, /IO/<1µA; VDD=10V; Tamb=25℃ | 8 | ||
| Input low voltage | VIL | 4 | V | VO=1.5V或13.5V, /IO/<1µA; VDD=15V; Tamb=25℃ | 8 | ||
| Input high voltage | VIH | 3.5 | V | VO=0.5V或4.5V, /IO/<1µA; VDD=5V; Tamb=25℃ | 8 | ||
| Input high voltage | VIH | 7 | V | VO=1.0V或9.0V, /IO/<1µA; VDD=10V; Tamb=25℃ | 8 | ||
| Input high voltage | VIH | 11 | V | VO=1.5V或13.5V, /IO/<1µA; VDD=15V; Tamb=25℃ | 8 | ||
| Output low current | IOL | 0.51 | 1 | mA | VO=0.4V, VI=0或5V; VDD=5V; Tamb=25℃ | 8 | |
| Output low current | IOL | 1.3 | 2.6 | mA | VO=0.5V, VI=0或10V; VDD=10V; Tamb=25℃ | 8 | |
| Output low current | IOL | 3.4 | 6.8 | mA | VO=1.5V, VI=0或15V; VDD=15V; Tamb=25℃ | 8 | |
| Output high current | IOH | -0.51 | -1 | mA | VO=4.6V, VI=0或5V; VDD=5V; Tamb=25℃ | 8 | |
| Output high current | IOH | -1.3 | -2.6 | mA | VO=9.5V, VI=0或10V; VDD=10V; Tamb=25℃ | 8 | |
| Output high current | IOH | -3.4 | -6.8 | mA | VO=13.5V, VI=0或15V; VDD=15V; Tamb=25℃ | 8 | |
| Output high current | IOH | -1.6 | -3.2 | mA | VO=2.5V, VI=0或5V; VDD=5V; Tamb=25℃ | 8 | |
| Input leakage current | IIN | -0.1 | 0.1 | µA | VIN=0或15V, VDD=15V; Tamb=25℃ | 8 | |
| Quiescent current (max) | IDD | 5 | µA | VI=VSS或VDD; IO=0; VDD=5V; Tamb=-40℃ | 7 | ||
| Quiescent current (max) | IDD | 10 | µA | VI=VSS或VDD; IO=0; VDD=10V; Tamb=-40℃ | 7 | ||
| Quiescent current (max) | IDD | 20 | µA | VI=VSS或VDD; IO=0; VDD=15V; Tamb=-40℃ | 7 | ||
| Quiescent current (max) | IDD | 150 | µA | VI=VSS或VDD; IO=0; VDD=5V; Tamb=85℃ | 9 | ||
| Quiescent current (max) | IDD | 300 | µA | VI=VSS或VDD; IO=0; VDD=10V; Tamb=85℃ | 9 | ||
| Quiescent current (max) | IDD | 600 | µA | VI=VSS或VDD; IO=0; VDD=15V; Tamb=85℃ | 9 | ||
| Propagation delay time, decoded outputs | tPHL, tPLH | 325 | 650 | ns | Tamb=25ºC, CL=50pF, input tr=tf=20ns, RL=200KΩ; VDD=5V | 10 | |
| Propagation delay time, decoded outputs | tPHL, tPLH | 135 | 270 | ns | Tamb=25ºC, CL=50pF, input tr=tf=20ns, RL=200KΩ; VDD=10V | 10 | |
| Propagation delay time, decoded outputs | tPHL, tPLH | 85 | 170 | ns | Tamb=25ºC, CL=50pF, input tr=tf=20ns, RL=200KΩ; VDD=15V | 10 | |
| Maximum clock input frequency | fCL | 2.5 | 5 | MHz | Tamb=25ºC, CL=50pF, input tr=tf=20ns; VDD=5V | 10 | |
| Maximum clock input frequency | fCL | 5 | 10 | MHz | Tamb=25ºC, CL=50pF, input tr=tf=20ns; VDD=10V | 10 | |
| Maximum clock input frequency | fCL | 5.5 | 11 | MHz | Tamb=25ºC, CL=50pF, input tr=tf=20ns; VDD=15V | 10 | |
| Input capacitance | CIN | 5 | pF | any pin; Tamb=25ºC | 10 |
CAD (KiCad official)
- Symbol:
CD4017CN - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4017cn-etched.step/cd4017cn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4017cn.step/cd4017cn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (16 pp, sha256
141ca40d50613ba8, retrieved 2026-11-04, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).