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Generated by kicad-footprint-generator · KiCad file format 20260206

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docs	Publish 0.1.0 · Ray	5d ago
viewers	cd4017bm96: viewers · Ray	5d ago
cd4017bm96-etched.glb	Publish 0.1.0 · Ray	5d ago
cd4017bm96-etched.step	cd4017bm96: factory component page (tier=mfr) · Ray	5d ago
cd4017bm96-hero.glb	cd4017bm96: hero GLB from the etched model (keeps the MPN mark) · Ray	5d ago
cd4017bm96-hero.overlay.json	Publish 0.1.0 · Ray	5d ago
cd4017bm96.glb	Publish 0.1.0 · Ray	5d ago
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cd4017bm96.kicad_sym	Publish 0.1.0 · Ray	5d ago
cd4017bm96.lbr	Publish 0.1.0 · Ray	5d ago
cd4017bm96.step	Publish 0.1.0 · Ray	5d ago
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CD4017BM96

Texas Instruments · Counters, Dividers · SOIC-16

CD4017BM96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Q5	output	Decoded decimal output "5", goes high only during the fifth count and stays high for one full clock cycle.
2	Q1	output	Decoded decimal output "1", goes high only during the second count slot and stays high for one full clock cycle.
3	Q0	output	Decoded decimal output "0", high in the zero-count state (after reset) and stays high for one full clock cycle.
4	Q2	output	Decoded decimal output "2", goes high only in its decoded time slot for one full clock cycle.
5	Q6	output	Decoded decimal output "6", goes high only in its decoded time slot for one full clock cycle.
6	Q7	output	Decoded decimal output "7", goes high only in its decoded time slot for one full clock cycle.
7	Q3	output	Decoded decimal output "3", goes high only in its decoded time slot for one full clock cycle.
8	VSS	power_in	Ground (VSS) reference terminal; supply voltages are referenced to it.
9	Q8	output	Decoded decimal output "8", goes high only in its decoded time slot for one full clock cycle.
10	Q4	output	Decoded decimal output "4", goes high only in its decoded time slot for one full clock cycle.
11	Q9	output	Decoded decimal output "9", goes high only in its decoded time slot for one full clock cycle.
12	CARRY OUT	output	Carry-out signal completing one cycle every 10 clock input cycles, used to ripple-clock the succeeding device in a counting chain.
13	CLOCK INHIBIT	input	Clock inhibit input; counter advancement is inhibited when high and enabled when low.
14	CLOCK	input	Schmitt-trigger clock input; counter advances one count on the positive clock transition when CLOCK INHIBIT is low.
15	RESET	input	A high signal on RESET clears the counter to its zero count.
16	VDD	power_in	Positive supply voltage, recommended 3 V to 18 V (absolute maximum -0.5 V to +20 V referenced to VSS).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16
Category	Logic
Pins	16

CAD (KiCad official)

Symbol: CD4017BM96
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: cd4017bm96-etched.step / cd4017bm96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4017bm96.step / cd4017bm96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (14 pp, sha256 47c31fbacdbf95b3, retrieved 2026-10-18, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF