component
CD40174BE
Public Made by Adomby adom
lingxingic Flip Flops, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"lcsc": "C22397204",
"digikey": "296-3508-5-ND",
"mouser": "595-CD40174BE"
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"pins": [
{
"number": "1",
"name": "MR",
"type": "input",
"description": "Master reset input: per the function table, a LOW level forces all outputs O0 to O5 LOW regardless of CP and D; the pin table labels this pin 'clock input', which conflicts with the function table."
},
{
"number": "2",
"name": "O0",
"type": "output",
"description": "Buffered output of flip-flop 1, which follows D0 on the rising edge of CP and is forced LOW when MR is LOW."
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{
"number": "3",
"name": "D0",
"type": "input",
"description": "Data input to flip-flop 1, sampled on the rising edge of CP (set-up and hold times apply per the AC characteristics)."
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{
"number": "4",
"name": "D1",
"type": "input",
"description": "Data input to flip-flop 2, sampled on the rising edge of CP (set-up and hold times apply per the AC characteristics)."
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{
"number": "5",
"name": "O1",
"type": "output",
"description": "Buffered output of flip-flop 2, which follows D1 on the rising edge of CP and is forced LOW when MR is LOW."
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{
"number": "6",
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"description": "Data input to flip-flop 3, sampled on the rising edge of CP (set-up and hold times apply per the AC characteristics)."
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{
"number": "7",
"name": "O2",
"type": "output",
"description": "Buffered output of flip-flop 3, which follows D2 on the rising edge of CP and is forced LOW when MR is LOW."
},
{
"number": "8",
"name": "VSS",
"type": "power_in",
"description": "Ground supply voltage (0 V); all voltages are referenced to VSS."
},
{
"number": "9",
"name": "CP",
"type": "input",
"description": "Clock input; data is transferred from D to O on the rising edge of CP when MR is HIGH."
},
{
"number": "10",
"name": "O3",
"type": "output",
"description": "Buffered output of flip-flop 4, which follows D3 on the rising edge of CP and is forced LOW when MR is LOW."
},
{
"number": "11",
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"type": "input",
"description": "Data input to flip-flop 4, sampled on the rising edge of CP (set-up and hold times apply per the AC characteristics)."
},
{
"number": "12",
"name": "O4",
"type": "output",
"description": "Buffered output of flip-flop 5, which follows D4 on the rising edge of CP and is forced LOW when MR is LOW."
},
{
"number": "13",
"name": "D4",
"type": "input",
"description": "Data input to flip-flop 5, sampled on the rising edge of CP (set-up and hold times apply per the AC characteristics)."
},
{
"number": "14",
"name": "D5",
"type": "input",
"description": "Data input to flip-flop 6, sampled on the rising edge of CP (set-up and hold times apply per the AC characteristics)."
},
{
"number": "15",
"name": "O5",
"type": "output",
"description": "Buffered output of flip-flop 6, which follows D5 on the rising edge of CP and is forced LOW when MR is LOW."
},
{
"number": "16",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage; the recommended operating range is 3 V to 15 V."
}
],
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"guards": "pin_guards 0.1: passed",
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"extractor flagged: The ordering section (page 3) lists CD40174BE(LX) and CD40174BM(LX) without explicitly tying the 'BE; Pin 1 (MR) is described as 'clock input' in the pin description table (page 5). The function table a; The pin configuration figure (Figure 2, page 4) is garbled in the text extraction. Pin numbers and n"
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