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CD4015BM

Public Made by Adom

by adom

lingxingic Shift Registers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CD4015BM

lingxingic · Shift Registers · SOP-16

CD4015BM from lingxingic, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 2CP input Clock input for the second 4-bit register, triggered on the LOW-to-HIGH edge.
2 2Q3 output Parallel output Q3 of the second 4-bit register.
3 1Q2 output Parallel output Q2 of the first 4-bit register.
4 1Q1 output Parallel output Q1 of the first 4-bit register.
5 1Q0 output Parallel output Q0 of the first 4-bit register.
6 1MR input Master reset input for the first register, active high; a HIGH level forces Q0 to Q3 LOW.
7 1D input Serial data input to the first 4-bit register.
8 VSS power_in Ground reference, 0 V.
9 1CP input Clock input for the first 4-bit register, triggered on the LOW-to-HIGH edge.
10 1Q3 output Parallel output Q3 of the first 4-bit register.
11 2Q2 output Parallel output Q2 of the second 4-bit register.
12 2Q1 output Parallel output Q1 of the second 4-bit register.
13 2Q0 output Parallel output Q0 of the second 4-bit register.
14 2MR input Master reset input for the second register, active high; a HIGH level forces Q0 to Q3 LOW.
15 2D input Serial data input to the second 4-bit register.
16 VDD power_in Supply voltage, recommended range 3 V to 15 V with respect to VSS.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VDD -0.5 18 V Voltages referenced to VSS 5
input voltage (all inputs) VI -0.5 V all inputs; max printed as VDD+0.5 V 5
DC input current, any one input IIK -10 10 mA any one input 5
storage temperature Tstg -65 150 ℃ 5
soldering temperature TL 260 ℃ 10s, SOP/TSSOP 5
supply voltage VDD 3 15 V 6
ambient temperature Tamb -40 125 ℃ in free air 6
HIGH-level input voltage, VDD=5V VIH 3.5 V Tamb=-40℃ to +125℃ 7
HIGH-level input voltage, VDD=10V VIH 7 V Tamb=-40℃ to +125℃ 7
HIGH-level input voltage, VDD=15V VIH 11 V Tamb=-40℃ to +125℃ 7
LOW-level input voltage, VDD=5V VIL 1.5 V Tamb=-40℃ to +125℃ 7
LOW-level input voltage, VDD=10V VIL 3 V Tamb=-40℃ to +125℃ 7
LOW-level input voltage, VDD=15V VIL 4 V Tamb=-40℃ to +125℃ 7
HIGH-level output voltage, VDD=5V VOH 4.95 V Tamb=-40℃ to +125℃; /IO/<1uA 7
HIGH-level output voltage, VDD=10V VOH 9.95 V Tamb=-40℃ to +125℃; /IO/<1uA 7
HIGH-level output voltage, VDD=15V VOH 14.95 V Tamb=-40℃ to +125℃; /IO/<1uA 7
LOW-level output voltage, VDD=5V VOL 0.05 V Tamb=-40℃ to +125℃; /IO/<1uA 7
LOW-level output voltage, VDD=10V VOL 0.05 V Tamb=-40℃ to +125℃; /IO/<1uA 7
LOW-level output voltage, VDD=15V VOL 0.05 V Tamb=-40℃ to +125℃; /IO/<1uA 7
HIGH-level output current, VDD=5V IOH -0.3 mA Tamb=-40℃ to +125℃; VO=4.6V 7
HIGH-level output current, VDD=5V IOH -1.15 mA Tamb=-40℃ to +125℃; VO=2.5V 7
HIGH-level output current, VDD=10V IOH -0.45 mA Tamb=-40℃ to +125℃; VO=9.5V 7
HIGH-level output current, VDD=15V IOH -1.4 mA Tamb=-40℃ to +125℃; VO=13.5V 7
LOW-level output current, VDD=5V IOL 0.29 mA Tamb=-40℃ to +125℃; VO=0.4V 7
LOW-level output current, VDD=10V IOL 0.38 mA Tamb=-40℃ to +125℃; VO=0.5V 7
LOW-level output current, VDD=15V IOL 1.2 mA Tamb=-40℃ to +125℃; VO=1.5V 7
input leakage current, VDD=15V II -1 1 uA Tamb=-40℃ to +125℃; VI=15V or GND 7
supply current, VDD=5V IDD 150 uA Tamb=-40℃ to +125℃; VI=5V or GND; IO=0A 7
supply current, VDD=10V IDD 300 uA Tamb=-40℃ to +125℃; VI=10V or GND; IO=0A 7
supply current, VDD=15V IDD 600 uA Tamb=-40℃ to +125℃; VI=15V or GND; IO=0A 7
nCP to Qn propagation delay time, VDD=5V tPHL, tPLH 300 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 3 8
nCP to Qn propagation delay time, VDD=10V tPHL, tPLH 132 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 3 8
nCP to Qn propagation delay time, VDD=15V tPHL, tPLH 96 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 3 8
MR to Qn HIGH to LOW propagation delay, VDD=5V tPHL 288 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
MR to Qn HIGH to LOW propagation delay, VDD=10V tPHL 132 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
MR to Qn HIGH to LOW propagation delay, VDD=15V tPHL 96 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
transition time, VDD=5V tTHL, tTLH 244 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 3 8
transition time, VDD=10V tTHL, tTLH 72 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 3 8
transition time, VDD=15V tTHL, tTLH 48 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 3 8
nD to nCP set-up time, VDD=5V tsu 30 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 5 8
nD to nCP set-up time, VDD=10V tsu 30 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 5 8
nD to nCP set-up time, VDD=15V tsu 24 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 5 8
nD to nCP hold time, VDD=5V th 48 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 6 8
nD to nCP hold time, VDD=10V th 24 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 6 8
nD to nCP hold time, VDD=15V th 18 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 6 8
CP LOW minimum pulse width, VDD=5V tw 72 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 6 8
CP LOW minimum pulse width, VDD=10V tw 36 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 6 8
CP LOW minimum pulse width, VDD=15V tw 24 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 6 8
nMR HIGH minimum width, VDD=5V tw 96 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
nMR HIGH minimum width, VDD=10V tw 36 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
nMR HIGH minimum width, VDD=15V tw 28 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
recovery time, VDD=5V trec 60 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
recovery time, VDD=10V trec 36 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
recovery time, VDD=15V trec 24 ns Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 4 8
Maximum frequency, VDD=5V fmax 5.8 MHZ Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 5 8
Maximum frequency, VDD=10V fmax 12.5 MHZ Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 5 8
Maximum frequency, VDD=15V fmax 18.3 MHZ Tamb=-40℃ to +125℃, VSS=0V; CL=50pF, see Figure 5 8

CAD (KiCad official)

  • Symbol: CD4015BM
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4015bm-etched.step / cd4015bm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4015bm.step / cd4015bm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (14 pp, sha256 e981bc5e75dbe2e3, retrieved 2026-10-29, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF