component
CD4013BM96
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| cd4013bm96-etched.glb | 5d ago |
| cd4013bm96-etched.step | 5d ago |
| cd4013bm96-hero.glb | 5d ago |
| cd4013bm96-hero.overlay.json | 5d ago |
| cd4013bm96.glb | 5d ago |
| cd4013bm96.kicad_mod | 5d ago |
| cd4013bm96.kicad_sym | 5d ago |
| cd4013bm96.lbr | 5d ago |
| cd4013bm96.step | 5d ago |
| package.json | 5d ago |
| page.json | 5d ago |
| README.md | 5d ago |
CD4013BM96
Texas Instruments · Flip Flops · SOIC-14
CD4013BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q1 | output | Buffered Q output of flip-flop 1, which takes the D level on the positive-going clock edge. |
| 2 | Q̄1 | output | Buffered complementary Q-bar output of flip-flop 1. |
| 3 | CLOCK1 | input | Clock input of flip-flop 1; D is transferred to Q on the positive-going clock transition. |
| 4 | RESET1 | input | Reset input of flip-flop 1; a high level resets it independently of the clock. |
| 5 | D1 | input | Data input of flip-flop 1. |
| 6 | SET1 | input | Set input of flip-flop 1; a high level sets it independently of the clock. |
| 7 | VSS | power_in | Negative supply / ground. |
| 8 | SET2 | input | Set input of flip-flop 2; a high level sets it independently of the clock. |
| 9 | D2 | input | Data input of flip-flop 2. |
| 10 | RESET2 | input | Reset input of flip-flop 2; a high level resets it independently of the clock. |
| 11 | CLOCK2 | input | Clock input of flip-flop 2; D is transferred to Q on the positive-going clock transition. |
| 12 | Q̄2 | output | Buffered complementary Q-bar output of flip-flop 2. |
| 13 | Q2 | output | Buffered Q output of flip-flop 2, which takes the D level on the positive-going clock edge. |
| 14 | VDD | power_in | Positive supply voltage, 3 V to 18 V recommended over the full package temperature range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD4013BM96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd4013bm96-etched.step/cd4013bm96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4013bm96.step/cd4013bm96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
2b2854f588b70230, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).