CD4013B

{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4013b",
  "title": "CD4013B",
  "brief": "TI dual D-type flip-flop, SOIC-14. CMOS 4000-series, set/reset, complementary outputs, 3-18 V. Datasheet-verified.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "flip-flop",
    "d-flip-flop",
    "4013",
    "soic-14",
    "texas-instruments"
  ],
  "component": {
    "mpn": "CD4013B",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic IC",
    "subcategory": "Dual D flip-flop",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4013b.pdf",
    "parts": {
      "symbol": "cd4013b.kicad_sym",
      "footprint": "cd4013b.kicad_mod",
      "model_3d": "cd4013b-etched.glb",
      "model_3d_plain": "cd4013b.glb",
      "lbr": "cd4013b.lbr",
      "model_3d_step": "cd4013b-etched.step",
      "model_3d_step_plain": "cd4013b.step"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "Q1",
        "type": "output",
        "description": "Channel 1 true (Q) output of the D flip-flop. CMOS push-pull; sources approx -0.51 mA and sinks approx 0.51 mA at VDD = 5 V. Follows D1 on the rising edge of CLOCK1."
      },
      {
        "number": "2",
        "name": "Q1_N",
        "type": "output",
        "description": "Inverted channel 1 output (Q̄). Complement of Q1 with the same CMOS drive characteristics."
      },
      {
        "number": "3",
        "name": "CLOCK1",
        "type": "input",
        "description": "Channel 1 clock input. Data on D1 is transferred to Q1 on the positive-going edge. Max clock frequency 3.5 MHz (VDD = 5 V) to 12 MHz (VDD = 15 V)."
      },
      {
        "number": "4",
        "name": "RESET1",
        "type": "input",
        "description": "Channel 1 asynchronous reset. A high level forces Q1 = 0 (Q̄ = 1) independent of CLOCK1. Min pulse width 180 ns at VDD = 5 V."
      },
      {
        "number": "5",
        "name": "D1",
        "type": "input",
        "description": "Channel 1 data input. Sampled on the positive-going edge of CLOCK1 and transferred to Q1. CMOS input, ~1 µA max at VDD = 18 V."
      },
      {
        "number": "6",
        "name": "SET1",
        "type": "input",
        "description": "Channel 1 asynchronous set. A high level forces Q1 = 1 (Q̄ = 0) independent of CLOCK1. Min pulse width 180 ns at VDD = 5 V."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference (0 V). All voltages in the datasheet are referenced to VSS."
      },
      {
        "number": "8",
        "name": "SET2",
        "type": "input",
        "description": "Channel 2 asynchronous set. A high level forces Q2 = 1 (Q̄ = 0) independent of CLOCK2."
      },
      {
        "number": "9",
        "name": "D2",
        "type": "input",
        "description": "Channel 2 data input. Sampled on the positive-going edge of CLOCK2 and transferred to Q2."
      },
      {
        "number": "10",
        "name": "RESET2",
        "type": "input",
        "description": "Channel 2 asynchronous reset. A high level forces Q2 = 0 independent of CLOCK2."
      },
      {
        "number": "11",
        "name": "CLOCK2",
        "type": "input",
        "description": "Channel 2 clock input. Data on D2 is transferred to Q2 on the positive-going edge. Same fCL limits as CLOCK1."
      },
      {
        "number": "12",
        "name": "Q2_N",
        "type": "output",
        "description": "Inverted channel 2 output (Q̄). Complement of Q2 with the same CMOS drive characteristics."
      },
      {
        "number": "13",
        "name": "Q2",
        "type": "output",
        "description": "Channel 2 true (Q) output. CMOS push-pull output; follows D2 on the rising edge of CLOCK2."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. Recommended operating range 3 V to 18 V (abs-max 20 V). Quiescent current ~0.02 µA typical at 25 °C."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4013b.pdf",
        "pages": 31,
        "sha256": "dea158db743cc96d",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4013",
      "logic_family": "CD4000",
      "function_code": "4013",
      "function_class": "Flip-Flop",
      "function_name": "Dual D Flip-Flop",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4013b.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4013b-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "068fb9e2d818540bd0395b60c4c8efeedc132ec184fdf81a6d50292076d4cb7d",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "Dual D-type flip-flop",
      "Trigger": "positive (rising) clock edge",
      "Async controls": "SET + RESET (active-high)",
      "Outputs": "Q + Q (complementary)",
      "Logic family": "4000B CMOS",
      "Supply voltage": "3-18 V",
      "Common uses": "dividers, latches, debounce",
      "Package": "SOIC-14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4013b",
    "cd4013",
    "4013",
    "dual d flip-flop",
    "cmos flip flop"
  ],
  "discovery_pitch": "CD4013B dual D-type flip-flop (SOIC-14) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4013b.kicad_sym",
    "cd4013b.kicad_mod",
    "cd4013b.glb",
    "cd4013b.lbr",
    "docs/hero.png",
    "docs/cd4013b-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4013b-etched.step"
  ],
  "variants": [
    {
      "mpn": "CD4013BM (SOIC-14, tube)",
      "kind": "packaging"
    },
    {
      "mpn": "CD4013BM96 (SOIC-14, tape & reel)",
      "kind": "packaging"
    }
  ]
}