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CD4011UBMT

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by adom

Texas Instruments Logic Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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CD4011UBMT

Texas Instruments · Logic Gates · SOIC-14

CD4011UBMT from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A. High-impedance CMOS logic input for the first 2-input NAND gate; VIH/VIL scale with VDD (typ. VDD=5 V: VIH>=3.5 V, VIL<=1.5 V). Unused inputs must be tied to VDD or VSS.
2 1B input Gate 1 input B. High-impedance CMOS logic input for the first 2-input NAND gate. Combined with 1A per Y = NAND(1A,1B). Unused inputs must be tied to VDD or VSS.
3 1Y output Gate 1 output. Unbuffered CMOS push-pull output; Y = NOT(1A AND 1B). Typical sink/source ~1 mA at VDD=5 V.
4 2Y output Gate 2 output. Unbuffered CMOS push-pull output; Y = NOT(2A AND 2B).
5 2A input Gate 2 input A. High-impedance CMOS logic input for the second 2-input NAND gate.
6 2B input Gate 2 input B. High-impedance CMOS logic input for the second 2-input NAND gate.
7 VSS power_in Negative supply / ground reference for all four gates. Typically 0 V. Decoupling of VDD to VSS with 0.1 uF close to the device is recommended.
8 3B input Gate 3 input B. High-impedance CMOS logic input for the third 2-input NAND gate.
9 3A input Gate 3 input A. High-impedance CMOS logic input for the third 2-input NAND gate.
10 3Y output Gate 3 output. Unbuffered CMOS push-pull output; Y = NOT(3A AND 3B).
11 4Y output Gate 4 output. Unbuffered CMOS push-pull output; Y = NOT(4A AND 4B).
12 4B input Gate 4 input B. High-impedance CMOS logic input for the fourth 2-input NAND gate.
13 4A input Gate 4 input A. High-impedance CMOS logic input for the fourth 2-input NAND gate.
14 VDD power_in Positive supply for all four gates. Operating range 3 V to 18 V (CD4000B family). Decouple to VSS with 0.1 uF placed close to the device.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • CD4011UBMT
  • CD4011UBMTM
  • CD4011UBMTM96
  • CD4011UBMTMR
  • CD4011UBMTE
  • CD4011UBMTEE4
  • CD4011UBMTF
  • CD4011UBMTF3A
  • CD4011UBMTNSR
  • CD4011UBMTPW
  • CD4011UBMTPWR

CAD (KiCad official)

  • Symbol: CD4011UBMT
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd4011ubmt-etched.step / cd4011ubmt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4011ubmt.step / cd4011ubmt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 bedb07024c5e0703, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF