main
Ray cd4011ubm96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 5af3511
{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4011ubm96",
  "title": "CD4011UBM96",
  "brief": "Texas Instruments Logic Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "cd4011ubm96",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "CD4011UBM96",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://www.ti.com/cn/lit/gpn/cd4011ub",
    "parts": {
      "symbol": "cd4011ubm96.kicad_sym",
      "footprint": "cd4011ubm96.kicad_mod",
      "model_3d": "cd4011ubm96-etched.glb",
      "model_3d_plain": "cd4011ubm96.glb",
      "model_3d_step": "cd4011ubm96-etched.step",
      "model_3d_step_plain": "cd4011ubm96.step",
      "lbr": "cd4011ubm96.lbr"
    },
    "distributor_links": {
      "lcsc": "C2865390"
    },
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "Input A to NAND gate 1 (with input B, output J); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "Input B to NAND gate 1 (with input A, output J); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."
      },
      {
        "number": "3",
        "name": "J",
        "type": "output",
        "description": "Output of NAND gate 1, J = NOT(A AND B)."
      },
      {
        "number": "4",
        "name": "K",
        "type": "output",
        "description": "Output of NAND gate 2, K = NOT(C AND D)."
      },
      {
        "number": "5",
        "name": "C",
        "type": "input",
        "description": "Input C to NAND gate 2 (with input D, output K); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."
      },
      {
        "number": "6",
        "name": "D",
        "type": "input",
        "description": "Input D to NAND gate 2 (with input C, output K); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference terminal, all voltages referenced to VSS."
      },
      {
        "number": "8",
        "name": "E",
        "type": "input",
        "description": "Input E to NAND gate 3 (with input F, output L); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."
      },
      {
        "number": "9",
        "name": "F",
        "type": "input",
        "description": "Input F to NAND gate 3 (with input E, output L); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."
      },
      {
        "number": "10",
        "name": "L",
        "type": "output",
        "description": "Output of NAND gate 3, L = NOT(E AND F)."
      },
      {
        "number": "11",
        "name": "M",
        "type": "output",
        "description": "Output of NAND gate 4, M = NOT(G AND H)."
      },
      {
        "number": "12",
        "name": "G",
        "type": "input",
        "description": "Input G to NAND gate 4 (with input H, output M); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."
      },
      {
        "number": "13",
        "name": "H",
        "type": "input",
        "description": "Input H to NAND gate 4 (with input G, output M); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage, absolute maximum -0.5V to +20V referenced to VSS, recommended operating range 3V to 18V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-sonnet-5",
        "primary_mode": "text+vision",
        "consensus_model": "claude-opus-4-8",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 20,
        "cost_usd": 0.623,
        "at": "2026-09-23T22:19:56"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/cd4011ub",
        "pages": 20,
        "sha256": "62907fabea7494c9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cd4011ubm96.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4011ubm96-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d34554ff829a02aea8664aaac56bfa4ef8c407886f536fac51869ae6ba38a93e",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4011ubm96"
  ],
  "discovery_pitch": "CD4011UBM96 (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4011ubm96.kicad_sym",
    "cd4011ubm96.kicad_mod",
    "cd4011ubm96.glb",
    "cd4011ubm96.step",
    "cd4011ubm96.lbr",
    "docs/hero.png",
    "docs/cd4011ubm96-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  }
}