main
Ray Publish 0.1.0 1edcf46 5d ago
{
  "slug": "cd4011bmt",
  "version": "0.1.0",
  "type": "component",
  "description": "HGSEMI Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "cd4011bmt",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4011bmt.kicad_sym",
    "cd4011bmt.kicad_mod",
    "cd4011bmt.glb",
    "cd4011bmt.step",
    "cd4011bmt.lbr",
    "docs/hero.png",
    "docs/cd4011bmt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4011bmt-hero.glb",
    "cd4011bmt-hero.overlay.json",
    "cd4011bmt-etched.glb"
  ],
  "component": {
    "mpn": "CD4011BMT",
    "manufacturer": "HGSEMI",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758075378797817856",
    "parts": {
      "symbol": "cd4011bmt.kicad_sym",
      "footprint": "cd4011bmt.kicad_mod",
      "model_3d": "cd4011bmt-hero.glb",
      "model_3d_plain": "cd4011bmt-etched.glb",
      "model_3d_step": "cd4011bmt-etched.step",
      "model_3d_step_plain": "cd4011bmt.step",
      "lbr": "cd4011bmt.lbr"
    },
    "distributor_links": {
      "lcsc": "C5310796",
      "digikey": "296-CD4011BMTTR-ND",
      "mouser": "595-CD4011BMT"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T02:20:25Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-CD4011BMTTR-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "595-CD4011BMT",
        "status": "found",
        "lifecycle": "End of Life"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "I1",
        "type": "input",
        "description": "Input 1 of NAND gate 1; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD."
      },
      {
        "number": "2",
        "name": "I2",
        "type": "input",
        "description": "Input 2 of NAND gate 1; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD."
      },
      {
        "number": "3",
        "name": "O1",
        "type": "output",
        "description": "Buffered output of NAND gate 1 (inputs I1 and I2); absolute maximum input/output current is ±10 mA."
      },
      {
        "number": "4",
        "name": "O2",
        "type": "output",
        "description": "Buffered output of NAND gate 2 (inputs I3 and I4); absolute maximum input/output current is ±10 mA."
      },
      {
        "number": "5",
        "name": "I3",
        "type": "input",
        "description": "Input 3 of NAND gate 2; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD."
      },
      {
        "number": "6",
        "name": "I4",
        "type": "input",
        "description": "Input 4 of NAND gate 2; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device."
      },
      {
        "number": "8",
        "name": "I5",
        "type": "input",
        "description": "Input 5 of NAND gate 3; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD."
      },
      {
        "number": "9",
        "name": "I6",
        "type": "input",
        "description": "Input 6 of NAND gate 3; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD."
      },
      {
        "number": "10",
        "name": "O3",
        "type": "output",
        "description": "Buffered output of NAND gate 3 (inputs I5 and I6); absolute maximum input/output current is ±10 mA."
      },
      {
        "number": "11",
        "name": "O4",
        "type": "output",
        "description": "Buffered output of NAND gate 4 (inputs I7 and I8); absolute maximum input/output current is ±10 mA."
      },
      {
        "number": "12",
        "name": "I7",
        "type": "input",
        "description": "Input 7 of NAND gate 4; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD."
      },
      {
        "number": "13",
        "name": "I8",
        "type": "input",
        "description": "Input 8 of NAND gate 4; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply; recommended VDD is 3 V to 15 V (absolute maximum -0.5 V to 18 V)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet gives a single 14-pin assignment table (pin number, symbol, function) for the CD4011B,; The datasheet pin table gives only pin function labels (input, output, ground, power). The NAND-gate; Pin types for I1-I8 and O1-O4 follow the datasheet's '输入端' (input) and '输出端' (output) labels; the da"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0559,
        "at": "2026-10-19T02:18:07"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758075378797817856",
        "pages": 10,
        "sha256": "5f5ccfab60c3ae62",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cd4011bmt.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.0
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4011bmt-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.0
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6c12139226f4f991336d1417f5b89f6404249731cca81a9873ac6bdf0cdc77c5",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}