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CD4011BMT

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HGSEMI Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CD4011BMT

HGSEMI · Logic Gates · TSSOP-14

CD4011BMT from HGSEMI, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I1 input Input 1 of NAND gate 1; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD.
2 I2 input Input 2 of NAND gate 1; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD.
3 O1 output Buffered output of NAND gate 1 (inputs I1 and I2); absolute maximum input/output current is ±10 mA.
4 O2 output Buffered output of NAND gate 2 (inputs I3 and I4); absolute maximum input/output current is ±10 mA.
5 I3 input Input 3 of NAND gate 2; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD.
6 I4 input Input 4 of NAND gate 2; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD.
7 VSS power_in Ground reference (0 V) for the device.
8 I5 input Input 5 of NAND gate 3; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD.
9 I6 input Input 6 of NAND gate 3; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD.
10 O3 output Buffered output of NAND gate 3 (inputs I5 and I6); absolute maximum input/output current is ±10 mA.
11 O4 output Buffered output of NAND gate 4 (inputs I7 and I8); absolute maximum input/output current is ±10 mA.
12 I7 input Input 7 of NAND gate 4; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD.
13 I8 input Input 8 of NAND gate 4; absolute maximum input voltage is -0.5 V to VDD+0.5 V and recommended VIN is 0 V to VDD.
14 VDD power_in Positive supply; recommended VDD is 3 V to 15 V (absolute maximum -0.5 V to 18 V).

Key specifications

Parameter Value
Manufacturer HGSEMI
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 3 15 V VSS=0V, Tamb=25℃ unless otherwise specified 3
Input voltage VIN 0 V VSS=0V, Tamb=25℃ unless otherwise specified 3
Operating ambient temperature Tamb -40 85 ℃ 3
Supply voltage VDD -0.5 18 V 2
Input voltage VI -0.5 V 2
Input/output current ±I -10 10 mA 2
Output power dissipation P 100 mW 2
Storage temperature Tstg -65 150 ℃ 2
Soldering temperature TL 260 ℃ 10 s 2
Static supply current IDD 7.5 µA Tamb=25℃; VI=VSS or VDD; IO=0; VDD=5V 3
Static supply current IDD 15 µA Tamb=25℃; VI=VSS or VDD; IO=0; VDD=10V 3
Static supply current IDD 30 µA Tamb=25℃; VI=VSS or VDD; IO=0; VDD=15V 3
Output low voltage VOL 0.05 V Tamb=25℃; VI=VSS or VDD; /IO/<1µA; VDD=5V 3
Output high voltage VOH 4.95 V Tamb=25℃; VI=VSS or VDD; /IO/<1µA; VDD=5V 3
Output high voltage VOH 9.95 V Tamb=25℃; VI=VSS or VDD; /IO/<1µA; VDD=10V 3
Output high voltage VOH 14.95 V Tamb=25℃; VI=VSS or VDD; /IO/<1µA; VDD=15V 3
Input low voltage VIL 1.5 V Tamb=25℃; VO=0.5V or 4.5V; /IO/<1µA; VDD=5V 3
Input low voltage VIL 3 V Tamb=25℃; VO=1.0V or 9.0V; /IO/<1µA; VDD=10V 3
Input low voltage VIL 4 V Tamb=25℃; VO=1.5V or 13.5V; /IO/<1µA; VDD=15V 3
Input high voltage VIH 3.5 V Tamb=25℃; VO=0.5V or 4.5V; /IO/<1µA; VDD=5V 3
Input high voltage VIH 7 V Tamb=25℃; VO=1.0V or 9.0V; /IO/<1µA; VDD=10V 3
Input high voltage VIH 11 V Tamb=25℃; VO=1.5V or 13.5V; /IO/<1µA; VDD=15V 3
Output low current IOL 0.44 mA Tamb=25℃; VO=0.4V; VI=0 or 5V; VDD=5V 3
Output low current IOL 1.1 mA Tamb=25℃; VO=0.5V; VI=0 or 10V; VDD=10V 3
Output low current IOL 3 mA Tamb=25℃; VO=1.5V; VI=0 or 15V; VDD=15V 3
Output high current -IOH 0.44 mA Tamb=25℃; VO=4.6V; VI=0 or 5V; VDD=5V 3
Output high current -IOH 1.1 mA Tamb=25℃; VO=9.5V; VI=0 or 10V; VDD=10V 3
Output high current -IOH 3 mA Tamb=25℃; VO=13.5V; VI=0 or 15V; VDD=15V 3
Output high current -IOH 1.4 mA Tamb=25℃; VO=2.5V; VI=0 or 5V; VDD=5V 3
Input leakage current ±IIN -0.3 0.3 µA Tamb=25℃; VIN=0 or 15V; VDD=15V 3
Propagation delay tPHL 55 110 ns Tamb=25℃; CL=50pF; Input tr=tf≤20ns; VDD=5V 6
Propagation delay tPHL 25 45 ns Tamb=25℃; CL=50pF; Input tr=tf≤20ns; VDD=10V 6
Propagation delay tPHL 20 35 ns Tamb=25℃; CL=50pF; Input tr=tf≤20ns; VDD=15V 6
Output transition time tTHL 60 120 ns Tamb=25℃; CL=50pF; Input tr=tf≤20ns; VDD=5V 6
Output transition time tTHL 30 60 ns Tamb=25℃; CL=50pF; Input tr=tf≤20ns; VDD=10V 6
Output transition time tTHL 20 40 ns Tamb=25℃; CL=50pF; Input tr=tf≤20ns; VDD=15V 6
Static supply current IDD 1 µA Tamb=-40℃; VI=VSS or VDD; IO=0; VDD=5V 4
Static supply current IDD 2 µA Tamb=-40℃; VI=VSS or VDD; IO=0; VDD=10V 4
Static supply current IDD 4 µA Tamb=-40℃; VI=VSS or VDD; IO=0; VDD=15V 4
Static supply current IDD 7.5 µA Tamb=85℃; VI=VSS or VDD; IO=0; VDD=5V 5
Static supply current IDD 15 µA Tamb=85℃; VI=VSS or VDD; IO=0; VDD=10V 5
Static supply current IDD 30 µA Tamb=85℃; VI=VSS or VDD; IO=0; VDD=15V 5
Output low current IOL 0.52 mA Tamb=-40℃; VO=0.4V; VI=0 or 5V; VDD=5V 4
Output low current IOL 1.3 mA Tamb=-40℃; VO=0.5V; VI=0 or 10V; VDD=10V 4
Output low current IOL 3.6 mA Tamb=-40℃; VO=1.5V; VI=0 or 15V; VDD=15V 4
Output low current IOL 0.36 mA Tamb=85℃; VO=0.4V; VI=0 or 5V; VDD=5V 5
Output low current IOL 0.9 mA Tamb=85℃; VO=0.5V; VI=0 or 10V; VDD=10V 5
Output low current IOL 2.4 mA Tamb=85℃; VO=1.5V; VI=0 or 15V; VDD=15V 5
Output high current -IOH 1.7 mA Tamb=-40℃; VO=2.5V; VI=0 or 5V; VDD=5V 4
Output high current -IOH 1.1 mA Tamb=85℃; VO=2.5V; VI=0 or 5V; VDD=5V 5
Input leakage current ±IIN -0.3 0.3 µA Tamb=-40℃; VIN=0 or 15V; VDD=15V 4
Input leakage current ±IIN -1 1 µA Tamb=85℃; VIN=0 or 15V; VDD=15V 5

CAD (KiCad official)

  • Symbol: CD4011BMT
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4011bmt-etched.step / cd4011bmt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4011bmt.step / cd4011bmt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (10 pp, sha256 5f5ccfab60c3ae62, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF