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CD4011BE

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Texas Instruments Logic Gates, DIP-14. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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CD4011BE

Texas Instruments · Logic Gates · DIP-14

CD4011BE from Texas Instruments, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1A input Gate 1 input 1, CMOS-protected input that must be tied to VDD or VSS when unused (VIL max 1.5 V at 5 V, VIH min 3.5 V at 5 V).
2 IN1B input Gate 1 input 2, CMOS-protected input that must be tied to VDD or VSS when unused (input capacitance 5 pF typ).
3 OUT1 output Gate 1 NAND output of inputs 1 and 2, sinking 0.51 mA min and sourcing 0.51 mA min at 5 V, 25 °C.
4 OUT2 output Gate 2 NAND output of inputs 5 and 6, sinking 0.51 mA min and sourcing 0.51 mA min at 5 V, 25 °C.
5 IN2A input Gate 2 input 1, CMOS-protected input that must be tied to VDD or VSS when unused.
6 IN2B input Gate 2 input 2, CMOS-protected input that must be tied to VDD or VSS when unused.
7 VSS power_in Negative supply terminal (ground, VSS) for the device.
8 IN3A input Gate 3 input 1, CMOS-protected input that must be tied to VDD or VSS when unused.
9 IN3B input Gate 3 input 2, CMOS-protected input that must be tied to VDD or VSS when unused.
10 OUT3 output Gate 3 NAND output of inputs 8 and 9, sinking 0.51 mA min and sourcing 0.51 mA min at 5 V, 25 °C.
11 OUT4 output Gate 4 NAND output of inputs 12 and 13, sinking 0.51 mA min and sourcing 0.51 mA min at 5 V, 25 °C.
12 IN4A input Gate 4 input 1, CMOS-protected input that must be tied to VDD or VSS when unused.
13 IN4B input Gate 4 input 2, CMOS-protected input that must be tied to VDD or VSS when unused.
14 VDD power_in Positive supply terminal (VDD); the datasheet's static characteristics are specified at 5 V, 10 V, 15 V and 20 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4011BE
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4011be-etched.step / cd4011be-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4011be.step / cd4011be.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 46a842f6da764f38, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF