CD4011B Quad NAND Gate

{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4011",
  "title": "CD4011B Quad NAND Gate",
  "brief": "Quad 2-input NAND gate in the 4000B CMOS family, 3 V to 18 V.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "logic",
    "nand-gate",
    "cmos",
    "4000-series",
    "ti",
    "soic-14"
  ],
  "component": {
    "mpn": "CD4011B",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gate",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4011b.pdf",
    "parts": {
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    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Gate 1 input A. High-impedance CMOS logic input to the first 2-input NAND gate; VIL max = 1.5 V at VDD=5 V, VIH min = 3.5 V at VDD=5 V. Protected by on-chip input clamp diodes to VDD and VSS."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Gate 1 input B. High-impedance CMOS logic input to the first 2-input NAND gate; input current typ 10 pA (IIN max 0.1 µA at VDD=18 V). Protected by CMOS input protection network."
      },
      {
        "number": "3",
        "name": "1Y",
        "type": "output",
        "description": "Gate 1 output (NAND of pins 1 and 2). Buffered CMOS push-pull output; IOL min = 1.0 mA sink and IOH min = -1.0 mA source at VDD=5 V (VO=0.4 V / 4.6 V)."
      },
      {
        "number": "4",
        "name": "2Y",
        "type": "output",
        "description": "Gate 2 output (NAND of pins 5 and 6). Buffered CMOS push-pull output; symmetrical drive characteristics per JEDEC Standard No. 13B for B-series CMOS."
      },
      {
        "number": "5",
        "name": "2A",
        "type": "input",
        "description": "Gate 2 input A. High-impedance CMOS logic input to the second 2-input NAND gate; noise margin 1 V at VDD=5 V, 2 V at VDD=10 V, 2.5 V at VDD=15 V over full package temperature range."
      },
      {
        "number": "6",
        "name": "2B",
        "type": "input",
        "description": "Gate 2 input B. High-impedance CMOS logic input to the second 2-input NAND gate; DC input current ±10 mA absolute maximum per input."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference. All input and output voltages are referenced to this pin. Tie to 0 V for single-supply operation."
      },
      {
        "number": "8",
        "name": "3A",
        "type": "input",
        "description": "Gate 3 input A. High-impedance CMOS logic input to the third 2-input NAND gate; input capacitance CIN typ 5 pF (max 7.5 pF)."
      },
      {
        "number": "9",
        "name": "3B",
        "type": "input",
        "description": "Gate 3 input B. High-impedance CMOS logic input to the third 2-input NAND gate; input voltage range VSS-0.5 V to VDD+0.5 V absolute maximum."
      },
      {
        "number": "10",
        "name": "3Y",
        "type": "output",
        "description": "Gate 3 output (NAND of pins 8 and 9). Buffered CMOS output; VOL max = 0.05 V and VOH min = 4.95 V at VDD=5 V (no load)."
      },
      {
        "number": "11",
        "name": "4Y",
        "type": "output",
        "description": "Gate 4 output (NAND of pins 12 and 13). Buffered CMOS output; typical propagation delay tPHL/tPLH = 60 ns at VDD=10 V, CL=50 pF, RL=200 kΩ."
      },
      {
        "number": "12",
        "name": "4A",
        "type": "input",
        "description": "Gate 4 input A. High-impedance CMOS logic input to the fourth 2-input NAND gate; all inputs protected by on-chip clamp diode network to VDD and VSS."
      },
      {
        "number": "13",
        "name": "4B",
        "type": "input",
        "description": "Gate 4 input B. High-impedance CMOS logic input to the fourth 2-input NAND gate; standardized symmetrical output characteristics per B-series CMOS spec."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. Recommended operating range 3 V to 18 V (VDD-VSS); absolute maximum -0.5 V to +20 V referenced to VSS. Quiescent current IDD typ 0.01 µA (max 1 µA) at VDD=10 V, TA=25 °C."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4011b.pdf",
        "pages": 23,
        "sha256": "92d82fa35555e4e4",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4011",
      "logic_family": "CD4000",
      "function_code": "4011",
      "function_class": "Gate",
      "function_name": "Quad 2-Input NAND Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
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      {
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        "checked": "2026-10-07",
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      }
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  },
  "metadata": {
    "specs": {
      "Type": "Quad 2-input NAND gate",
      "Logic family": "4000B (CMOS)",
      "Supply voltage": "3 V to 18 V",
      "Propagation delay": "60 ns typ at 10 V",
      "Quiescent current": "0.04 uA typ at 5 V",
      "Operating temperature": "-55 C to 125 C"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "NAND gate",
    "CMOS logic",
    "wide-voltage logic",
    "oscillator gate"
  ],
  "discovery_pitch": "Four 2-input NAND gates that run from 3 V to 18 V, handy for oscillators, latches, and glue logic.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
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    "path": "docs/hero.png"
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  "variants": [
    {
      "mpn": "CD4011BE",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BEE4",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BN",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BF",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BF3A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BJ",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BM",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BM96",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BMT",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BME4",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BM96E4",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BD",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BNSR",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BNS",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BPW",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BPWR",
      "kind": "unknown"
    },
    {
      "mpn": "CD4011BPWRG4",
      "kind": "unknown"
    }
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}