component
CD4010BPWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownCD4010BPWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-16
CD4010BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Collector supply for the output stage (DTL/TTL supply), recommended 3 V minimum to VDD maximum. |
| 2 | G | output | Non-inverting buffer output for input A, with high sink current capability (IOL min 3.75 mA at VDD=5 V, 0.5 V output). |
| 3 | A | input | Buffer input A, voltage range -0.5 V to VDD+0.5 V absolute maximum, DC input current ±10 mA max. |
| 4 | H | output | Non-inverting buffer output for input B, with high sink current capability. |
| 5 | B | input | Buffer input B, voltage range -0.5 V to VDD+0.5 V absolute maximum, DC input current ±10 mA max. |
| 6 | I | output | Non-inverting buffer output for input C, with high sink current capability. |
| 7 | C | input | Buffer input C, voltage range -0.5 V to VDD+0.5 V absolute maximum, DC input current ±10 mA max. |
| 8 | VSS | power_in | Ground (negative supply) terminal; voltages are referenced to VSS. |
| 9 | D | input | Buffer input D, voltage range -0.5 V to VDD+0.5 V absolute maximum, DC input current ±10 mA max. |
| 10 | J | output | Non-inverting buffer output for input D, with high sink current capability. |
| 11 | E | input | Buffer input E, voltage range -0.5 V to VDD+0.5 V absolute maximum, DC input current ±10 mA max. |
| 12 | K | output | Non-inverting buffer output for input E, with high sink current capability. |
| 13 | NC | unconnected | No connection. |
| 14 | F | input | Buffer input F, voltage range -0.5 V to VDD+0.5 V absolute maximum, DC input current ±10 mA max. |
| 15 | L | output | Non-inverting buffer output for input F, with high sink current capability. |
| 16 | VDD | power_in | Positive supply voltage, recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4010BPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4010bpwr-etched.step/cd4010bpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4010bpwr.step/cd4010bpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
1d1c975eae5e9508, retrieved 2026-10-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).