main
Ray cd40109bpwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… aeb4baa
{
  "schema_version": 1,
  "type": "component",
  "slug": "cd40109bpwr",
  "title": "CD40109BPWR",
  "brief": "Texas Instruments Translators / Level Shifters, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "cd40109bpwr"
  ],
  "component": {
    "mpn": "CD40109BPWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Translators / Level Shifters",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd40109b.pdf",
    "parts": {
      "symbol": "cd40109bpwr.kicad_sym",
      "footprint": "cd40109bpwr.kicad_mod",
      "model_3d": "cd40109bpwr-etched.glb",
      "model_3d_plain": "cd40109bpwr.glb",
      "model_3d_step": "cd40109bpwr-etched.step",
      "model_3d_step_plain": "cd40109bpwr.step",
      "lbr": "cd40109bpwr.lbr"
    },
    "distributor_links": {
      "digikey": "296-12163-2-ND",
      "lcsc": "C131950"
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC",
        "type": "power_in",
        "description": "Low-voltage supply for the input logic side. Recommended 3-18V; must be ≤ VDD in normal use (mode VCC > VDD is allowed for high-to-low shifting)."
      },
      {
        "number": "2",
        "name": "ENABLE A",
        "type": "input",
        "description": "Three-state enable for channel A→E output. Logic 1 (=VCC) enables the output; logic 0 (=VSS) places output E in high-impedance state."
      },
      {
        "number": "3",
        "name": "A",
        "type": "input",
        "description": "Low-voltage logic data input for channel A. Logic 1 = VCC, logic 0 = VSS; shifted to output E at VDD levels."
      },
      {
        "number": "4",
        "name": "E",
        "type": "tri_state",
        "description": "High-voltage three-state logic output for channel A→E. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE A = 0."
      },
      {
        "number": "5",
        "name": "F",
        "type": "tri_state",
        "description": "High-voltage three-state logic output for channel B→F. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE B = 0."
      },
      {
        "number": "6",
        "name": "B",
        "type": "input",
        "description": "Low-voltage logic data input for channel B. Logic 1 = VCC, logic 0 = VSS; shifted to output F at VDD levels."
      },
      {
        "number": "7",
        "name": "ENABLE B",
        "type": "input",
        "description": "Three-state enable for channel B→F output. Logic 1 = VCC enables the output; logic 0 places output F in high-impedance state."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground / negative supply, common to both VCC and VDD rails."
      },
      {
        "number": "9",
        "name": "ENABLE C",
        "type": "input",
        "description": "Three-state enable for channel C→G output. Logic 1 = VCC enables the output; logic 0 places output G in high-impedance state."
      },
      {
        "number": "10",
        "name": "C",
        "type": "input",
        "description": "Low-voltage logic data input for channel C. Logic 1 = VCC, logic 0 = VSS; shifted to output G at VDD levels."
      },
      {
        "number": "11",
        "name": "G",
        "type": "tri_state",
        "description": "High-voltage three-state logic output for channel C→G. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE C = 0."
      },
      {
        "number": "12",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection. Leave floating or tie as convenient for PCB routing."
      },
      {
        "number": "13",
        "name": "H",
        "type": "tri_state",
        "description": "High-voltage three-state logic output for channel D→H. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE D = 0."
      },
      {
        "number": "14",
        "name": "D",
        "type": "input",
        "description": "Low-voltage logic data input for channel D. Logic 1 = VCC, logic 0 = VSS; shifted to output H at VDD levels."
      },
      {
        "number": "15",
        "name": "ENABLE D",
        "type": "input",
        "description": "Three-state enable for channel D→H output. Logic 1 = VCC enables the output; logic 0 places output H in high-impedance state."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "High-voltage supply for the output side. Recommended 3-18V; sets the output logic-1 level. Absolute max 20V referenced to VSS."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd40109b.pdf",
        "pages": 18,
        "sha256": "945f61ad7c94f1e9",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.8625,
        -2.275
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "TSSOP-16_4.4x5mm_P0.65mm@sha256:fbac79fc5f310754",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "CD40109",
      "logic_family": "CD4000",
      "function_code": "40109",
      "function_class": null,
      "function_name": null,
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd40109bpwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd40109bpwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "6fb81d6b4217afdc4d7071ae95e58cbd5da0848b54a16360c88b6c6faaa8b30f",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd40109bpwr"
  ],
  "discovery_pitch": "CD40109BPWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd40109bpwr.kicad_sym",
    "cd40109bpwr.kicad_mod",
    "cd40109bpwr.glb",
    "cd40109bpwr.step",
    "cd40109bpwr-etched.step",
    "cd40109bpwr.lbr",
    "docs/hero.png",
    "docs/cd40109bpwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "CD40109BPWR",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRE4",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRG4",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRPW.A",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWR.A",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRNSR",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRNSRE4",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRNSR.A",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRE",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRBE",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRBE.A",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRF",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRBF",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRBF3A",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRBF.A",
      "kind": "packaging"
    },
    {
      "mpn": "CD40109BPWRBF3A.A",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-24T18:37:49.269Z"
}