component
CD40107BM96
Public Made by Adomby adom
Texas Instruments Inverters, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+122−8@@ -1,13 +1,132 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cd40107bm96",+ "title": "CD40107BM96",+ "brief": "Texas Instruments Inverters, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Inverters, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "cd40107bm96" ],+ "component": {+ "mpn": "CD40107BM96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 9,+ "category": "Logic",+ "subcategory": "Inverters",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2303011100_Texas-Instruments-CD40107BM96_C2691402.pdf",+ "parts": {+ "symbol": "cd40107bm96.kicad_sym",+ "footprint": "cd40107bm96.kicad_mod",+ "model_3d": "cd40107bm96.glb",+ "model_3d_step": "cd40107bm96.step",+ "lbr": "cd40107bm96.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "1A",+ "type": "input",+ "description": "Gate 1 input A. CMOS logic input to the first 2-input NAND stage."+ },+ {+ "number": "2",+ "name": "1B",+ "type": "input",+ "description": "Gate 1 input B. CMOS logic input to the first 2-input NAND stage."+ },+ {+ "number": "3",+ "name": "1C",+ "type": "output",+ "description": "Gate 1 open-drain NAND output (C = NOT(A AND B)). N-channel open-drain output capable of sinking large currents; requires an external pull-up to the desired load rail. Sink capability typ. tens of mA at VDD=10 V."+ },+ {+ "number": "4",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. Leave floating or tie to a convenient net; not internally bonded."+ },+ {+ "number": "5",+ "name": "2C",+ "type": "output",+ "description": "Gate 2 open-drain NAND output (C = NOT(A AND B)). N-channel open-drain output capable of sinking large currents; requires an external pull-up to the desired load rail."+ },+ {+ "number": "6",+ "name": "2B",+ "type": "input",+ "description": "Gate 2 input B. CMOS logic input to the second 2-input NAND stage."+ },+ {+ "number": "7",+ "name": "2A",+ "type": "input",+ "description": "Gate 2 input A. CMOS logic input to the second 2-input NAND stage."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply / ground reference. Typically 0 V."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply voltage, 3 V to 15 V (absolute max 18 V). Bypass with a local ceramic capacitor to VSS."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2303011100_Texas-Instruments-CD40107BM96_C2691402.pdf",+ "pages": 21,+ "sha256": "85a220a0d1b335ea",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOIC-8",+ "Category": "Logic",+ "Pins": "9"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cd40107bm96"+ ],+ "discovery_pitch": "CD40107BM96 (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +144,5 @@ "docs/cd40107bm96-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }