component
CD40106S
Public Made by Adomby adom
GR Inverters, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.1.0
b40831b
CD40106S
GR · Inverters · SOP-14
CD40106S from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Input of Schmitt inverter 1; the datasheet states that A pins are inputs and that VIN must stay within VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 2 | Y1 | output | Output of Schmitt inverter 1, driven from input A1; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 3 | A2 | input | Input of Schmitt inverter 2; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 4 | Y2 | output | Output of Schmitt inverter 2, driven from input A2; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 5 | A3 | input | Input of Schmitt inverter 3; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 6 | Y3 | output | Output of Schmitt inverter 3, driven from input A3; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 7 | VSS | power_in | Ground reference pin (0 V) for the device; the recommended input/output voltage range is 0 to VDD. |
| 8 | Y4 | output | Output of Schmitt inverter 4, driven from input A4; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 9 | A4 | input | Input of Schmitt inverter 4; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 10 | Y5 | output | Output of Schmitt inverter 5, driven from input A5; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 11 | A5 | input | Input of Schmitt inverter 5; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 12 | Y6 | output | Output of Schmitt inverter 6, driven from input A6; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 13 | A6 | input | Input of Schmitt inverter 6; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 14 | VDD | power_in | Positive supply pin; the datasheet gives an absolute maximum of -0.5 V to 20 V and a recommended operating range of 3 V to 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VDD | -0.5 | 20 | V | 1 | ||
| Input voltage (absolute maximum) | VIN | -0.5 | V | Referenced to VSS; printed as -0.5 to VSS-VDD+0.5 V (upper limit not a number) | 1 | ||
| Power dissipation | PD | 500 | mW | 1 | |||
| Operating temperature (absolute maximum) | TA | 0 | 70 | ℃ | 1 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 1 | ||
| Lead soldering temperature | TW | 260 | ℃ | 10s | 1 | ||
| Supply voltage (recommended) | VDD | 3 | 18 | V | 2 | ||
| Input/output voltage (recommended) | VIN、Vo | 0 | V | Maximum printed as VDD | 2 | ||
| Operating temperature (recommended) | TA | 0 | 60 | ℃ | 2 | ||
| High-level output voltage | VOH | 4.95 | V | /IO/<1uA, VDD=5V, TA=25℃ | 2 | ||
| High-level output voltage | VOH | 9.95 | V | /IO/<1uA, VDD=10V, TA=25℃ | 2 | ||
| High-level output voltage | VOH | 14.95 | V | /IO/<1uA, VDD=15V, TA=25℃ | 2 | ||
| Low-level output voltage | VOL | 0.05 | V | /IO/<1uA, VDD=5V, TA=25℃ | 2 | ||
| Input current | IIN | 0.01 | 1 | uA | VIN=VDD or VSS, VDD=18V, TA=25℃ | 2 | |
| Quiescent current (operating current) | IDD | 0.01 | 1 | uA | VIN=VDD or VSS, VDD=5V, TA=25℃ | 2 | |
| Quiescent current (operating current) | IDD | 0.01 | 2 | uA | VIN=VDD or VSS, VDD=10V, TA=25℃ | 2 | |
| Quiescent current (operating current) | IDD | 0.01 | 4 | uA | VIN=VDD or VSS, VDD=15V, TA=25℃ | 2 | |
| Quiescent current (operating current) | IDD | 0.01 | 20 | uA | VIN=VDD or VSS, VDD=18V, TA=25℃ | 2 | |
| Positive-going switching threshold voltage | VTP+ | 2.5 | V | /IO/≤1uA, VDD=5V, TA=25℃ | 2 | ||
| Positive-going switching threshold voltage | VTP+ | 4.2 | V | /IO/≤1uA, VDD=10V, TA=25℃ | 2 | ||
| Positive-going switching threshold voltage | VTP+ | 5.8 | V | /IO/≤1uA, VDD=15V, TA=25℃ | 2 | ||
| Negative-going switching threshold voltage | VTN- | 1.2 | V | /IO/≤1uA, VDD=5V, TA=25℃ | 2 | ||
| Negative-going switching threshold voltage | VTN- | 2 | V | /IO/≤1uA, VDD=10V, TA=25℃ | 2 | ||
| Negative-going switching threshold voltage | VTN- | 2.6 | V | /IO/≤1uA, VDD=15V, TA=25℃ | 2 | ||
| Hysteresis voltage (VTP+ - VTN-) | VTH | 1.3 | V | VDD=5V, TA=25℃ | 2 | ||
| Hysteresis voltage (VTP+ - VTN-) | VTH | 2.2 | V | VDD=10V, TA=25℃ | 2 | ||
| Hysteresis voltage (VTP+ - VTN-) | VTH | 3.2 | V | VDD=15V, TA=25℃ | 2 | ||
| High-level output current | IOH | -3 | mA | Vo=4.6V, VDD=5V, TA=25℃ | 2 | ||
| High-level output current | IOH | -6.4 | mA | Vo=9.5V, VDD=10V, TA=25℃ | 2 | ||
| High-level output current | IOH | -22 | mA | Vo=13.5V, VDD=15V, TA=25℃ | 2 | ||
| Low-level output current | IOL | 4.8 | mA | Vo=0.4V, VDD=5V, TA=25℃ | 2 | ||
| Low-level output current | IOL | 11.5 | mA | Vo=0.5V, VDD=10V, TA=25℃ | 2 | ||
| Low-level output current | IOL | 42 | mA | Vo=1.5V, VDD=15V, TA=25℃ | 2 | ||
| Propagation delay A to Y, high-to-low | tPHL | 80 | ns | CL=51pF, Ta=25℃, VDD=5V | 3 | ||
| Propagation delay A to Y, low-to-high | tPLH | 140 | ns | CL=51pF, Ta=25℃, VDD=5V | 3 | ||
| Propagation delay A to Y, high-to-low | tPHL | 45 | ns | CL=51pF, Ta=25℃, VDD=10V | 3 | ||
| Propagation delay A to Y, low-to-high | tPLH | 75 | ns | CL=51pF, Ta=25℃, VDD=10V | 3 | ||
| Propagation delay A to Y, high-to-low | tPHL | 35 | ns | CL=51pF, Ta=25℃, VDD=15V | 3 | ||
| Propagation delay A to Y, low-to-high | tPLH | 55 | ns | CL=51pF, Ta=25℃, VDD=15V | 3 | ||
| Output rise/fall delay, high-to-low transition | tTHL | 30 | ns | CL=51pF, Ta=25℃, VDD=5V | 3 | ||
| Output rise/fall delay, low-to-high transition | tTLH | 30 | ns | CL=51pF, Ta=25℃, VDD=5V | 3 | ||
| Output rise/fall delay, high-to-low transition | tTHL | 15 | ns | CL=51pF, Ta=25℃, VDD=10V | 3 | ||
| Output rise/fall delay, low-to-high transition | tTLH | 20 | ns | CL=51pF, Ta=25℃, VDD=10V | 3 | ||
| Output rise/fall delay, high-to-low transition | tTHL | 10 | ns | CL=51pF, Ta=25℃, VDD=15V | 3 | ||
| Output rise/fall delay, low-to-high transition | tTLH | 15 | ns | CL=51pF, Ta=25℃, VDD=15V | 3 |
CAD (KiCad official)
- Symbol:
CD40106S - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd40106s-etched.step/cd40106s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd40106s.step/cd40106s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (5 pp, sha256
99d5bed5a4265f6f, retrieved 2026-11-04, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD40106S
**GR** · Inverters · SOP-14
CD40106S from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Input of Schmitt inverter 1; the datasheet states that A pins are inputs and that VIN must stay within VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 2 | Y1 | output | Output of Schmitt inverter 1, driven from input A1; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 3 | A2 | input | Input of Schmitt inverter 2; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 4 | Y2 | output | Output of Schmitt inverter 2, driven from input A2; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 5 | A3 | input | Input of Schmitt inverter 3; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 6 | Y3 | output | Output of Schmitt inverter 3, driven from input A3; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 7 | VSS | power_in | Ground reference pin (0 V) for the device; the recommended input/output voltage range is 0 to VDD. |
| 8 | Y4 | output | Output of Schmitt inverter 4, driven from input A4; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 9 | A4 | input | Input of Schmitt inverter 4; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 10 | Y5 | output | Output of Schmitt inverter 5, driven from input A5; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 11 | A5 | input | Input of Schmitt inverter 5; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 12 | Y6 | output | Output of Schmitt inverter 6, driven from input A6; the datasheet gives VOH/VOL and IOH/IOL limits for the Y outputs at VDD = 5 V, 10 V and 15 V. |
| 13 | A6 | input | Input of Schmitt inverter 6; the datasheet states that A pins are inputs with VIN limited to VSS-0.5 V to VDD+0.5 V (absolute maximum). |
| 14 | VDD | power_in | Positive supply pin; the datasheet gives an absolute maximum of -0.5 V to 20 V and a recommended operating range of 3 V to 18 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOP-14 |
| Category | Logic ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VDD | -0.5 | | 20 | V | | 1 |
| Input voltage (absolute maximum) | VIN | -0.5 | | | V | Referenced to VSS; printed as -0.5 to VSS-VDD+0.5 V (upper limit not a number) | 1 |
| Power dissipation | PD | | | 500 | mW | | 1 |
| Operating temperature (absolute maximum) | TA | 0 | | 70 | ℃ | | 1 |
| Storage temperature | TS | -65 | | 150 | ℃ | | 1 |
| Lead soldering temperature | TW | | | 260 | ℃ | 10s | 1 |
| Supply voltage (recommended) | VDD | 3 | | 18 | V | | 2 |
| Input/output voltage (recommended) | VIN、Vo | 0 | | | V | Maximum printed as VDD | 2 |
| Operating temperature (recommended) | TA | 0 | | 60 | ℃ | | 2 |
| High-level output voltage | VOH | 4.95 | | | V | /IO/<1uA, VDD=5V, TA=25℃ | 2 |
| High-level output voltage | VOH | 9.95 | | | V | /IO/<1uA, VDD=10V, TA=25℃ | 2 |
| High-level output voltage | VOH | 14.95 | | | V | /IO/<1uA, VDD=15V, TA=25℃ | 2 |
| Low-level output voltage | VOL | | | 0.05 | V | /IO/<1uA, VDD=5V, TA=25℃ | 2 |
| Input current | IIN | | 0.01 | 1 | uA | VIN=VDD or VSS, VDD=18V, TA=25℃ | 2 |
| Quiescent current (operating current) | IDD | | 0.01 | 1 | uA | VIN=VDD or VSS, VDD=5V, TA=25℃ | 2 |
| Quiescent current (operating current) | IDD | | 0.01 | 2 | uA | VIN=VDD or VSS, VDD=10V, TA=25℃ | 2 |
| Quiescent current (operating current) | IDD | | 0.01 | 4 | uA | VIN=VDD or VSS, VDD=15V, TA=25℃ | 2 |
| Quiescent current (operating current) | IDD | | 0.01 | 20 | uA | VIN=VDD or VSS, VDD=18V, TA=25℃ | 2 |
| Positive-going switching threshold voltage | VTP+ | | 2.5 | | V | /IO/≤1uA, VDD=5V, TA=25℃ | 2 |
| Positive-going switching threshold voltage | VTP+ | | 4.2 | | V | /IO/≤1uA, VDD=10V, TA=25℃ | 2 |
| Positive-going switching threshold voltage | VTP+ | | 5.8 | | V | /IO/≤1uA, VDD=15V, TA=25℃ | 2 |
| Negative-going switching threshold voltage | VTN- | | 1.2 | | V | /IO/≤1uA, VDD=5V, TA=25℃ | 2 |
| Negative-going switching threshold voltage | VTN- | | 2 | | V | /IO/≤1uA, VDD=10V, TA=25℃ | 2 |
| Negative-going switching threshold voltage | VTN- | | 2.6 | | V | /IO/≤1uA, VDD=15V, TA=25℃ | 2 |
| Hysteresis voltage (VTP+ - VTN-) | VTH | | 1.3 | | V | VDD=5V, TA=25℃ | 2 |
| Hysteresis voltage (VTP+ - VTN-) | VTH | | 2.2 | | V | VDD=10V, TA=25℃ | 2 |
| Hysteresis voltage (VTP+ - VTN-) | VTH | | 3.2 | | V | VDD=15V, TA=25℃ | 2 |
| High-level output current | IOH | | -3 | | mA | Vo=4.6V, VDD=5V, TA=25℃ | 2 |
| High-level output current | IOH | | -6.4 | | mA | Vo=9.5V, VDD=10V, TA=25℃ | 2 |
| High-level output current | IOH | | -22 | | mA | Vo=13.5V, VDD=15V, TA=25℃ | 2 |
| Low-level output current | IOL | | 4.8 | | mA | Vo=0.4V, VDD=5V, TA=25℃ | 2 |
| Low-level output current | IOL | | 11.5 | | mA | Vo=0.5V, VDD=10V, TA=25℃ | 2 |
| Low-level output current | IOL | | 42 | | mA | Vo=1.5V, VDD=15V, TA=25℃ | 2 |
| Propagation delay A to Y, high-to-low | tPHL | | 80 | | ns | CL=51pF, Ta=25℃, VDD=5V | 3 |
| Propagation delay A to Y, low-to-high | tPLH | | 140 | | ns | CL=51pF, Ta=25℃, VDD=5V | 3 |
| Propagation delay A to Y, high-to-low | tPHL | | 45 | | ns | CL=51pF, Ta=25℃, VDD=10V | 3 |
| Propagation delay A to Y, low-to-high | tPLH | | 75 | | ns | CL=51pF, Ta=25℃, VDD=10V | 3 |
| Propagation delay A to Y, high-to-low | tPHL | | 35 | | ns | CL=51pF, Ta=25℃, VDD=15V | 3 |
| Propagation delay A to Y, low-to-high | tPLH | | 55 | | ns | CL=51pF, Ta=25℃, VDD=15V | 3 |
| Output rise/fall delay, high-to-low transition | tTHL | | 30 | | ns | CL=51pF, Ta=25℃, VDD=5V | 3 |
| Output rise/fall delay, low-to-high transition | tTLH | | 30 | | ns | CL=51pF, Ta=25℃, VDD=5V | 3 |
| Output rise/fall delay, high-to-low transition | tTHL | | 15 | | ns | CL=51pF, Ta=25℃, VDD=10V | 3 |
| Output rise/fall delay, low-to-high transition | tTLH | | 20 | | ns | CL=51pF, Ta=25℃, VDD=10V | 3 |
| Output rise/fall delay, high-to-low transition | tTHL | | 10 | | ns | CL=51pF, Ta=25℃, VDD=15V | 3 |
| Output rise/fall delay, low-to-high transition | tTLH | | 15 | | ns | CL=51pF, Ta=25℃, VDD=15V | 3 |
## CAD (KiCad official)
- Symbol: `CD40106S`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `cd40106s-etched.step` / `cd40106s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd40106s.step` / `cd40106s.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [GR datasheet](docs/cd40106s-datasheet.pdf) (5 pp, sha256 `99d5bed5a4265f6f`, retrieved 2026-11-04, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd40106s-datasheet.pdf)