component
CD40106DMT
Public Made by Adomby adom
HGSEMI Flip Flops, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| cd40106dmt-etched.glb | 5d ago |
| cd40106dmt-etched.step | 5d ago |
| cd40106dmt-hero.glb | 5d ago |
| cd40106dmt-hero.overlay.json | 5d ago |
| cd40106dmt.glb | 5d ago |
| cd40106dmt.kicad_mod | 5d ago |
| cd40106dmt.kicad_sym | 5d ago |
| cd40106dmt.lbr | 5d ago |
| cd40106dmt.step | 5d ago |
| package.json | 5d ago |
| page.json | 5d ago |
| README.md | 5d ago |
CD40106DMT
HGSEMI · Flip Flops · TSSOP-14
CD40106DMT from HGSEMI, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Input of the first Schmitt inverter; input voltage must stay between 0 and VDD under recommended operating conditions. |
| 2 | Y1 | output | Output of the first Schmitt inverter (inverse of A1 per the truth table). |
| 3 | A2 | input | Input of the second Schmitt inverter; input voltage must stay between 0 and VDD under recommended operating conditions. |
| 4 | Y2 | output | Output of the second Schmitt inverter (inverse of A2 per the truth table). |
| 5 | A3 | input | Input of the third Schmitt inverter; input voltage must stay between 0 and VDD under recommended operating conditions. |
| 6 | Y3 | output | Output of the third Schmitt inverter (inverse of A3 per the truth table). |
| 7 | VSS | power_in | Negative supply / ground reference for the device; recommended VDD range is 3 V to 15 V relative to VSS. |
| 8 | Y4 | output | Output of the fourth Schmitt inverter (inverse of A4 per the truth table). |
| 9 | A4 | input | Input of the fourth Schmitt inverter; input voltage must stay between 0 and VDD under recommended operating conditions. |
| 10 | Y5 | output | Output of the fifth Schmitt inverter (inverse of A5 per the truth table). |
| 11 | A5 | input | Input of the fifth Schmitt inverter; input voltage must stay between 0 and VDD under recommended operating conditions. |
| 12 | Y6 | output | Output of the sixth Schmitt inverter (inverse of A6 per the truth table). |
| 13 | A6 | input | Input of the sixth Schmitt inverter; input voltage must stay between 0 and VDD under recommended operating conditions. |
| 14 | VDD | power_in | Positive supply; absolute maximum rating is -0.5 V to 18 V and recommended operating range is 3 V to 15 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output high voltage | VOH | 4.95 | V | /IO/<1uA, VDD=5V (Ta=25℃) | 4 | ||
| Output high voltage | VOH | 9.95 | V | /IO/<1uA, VDD=10V (Ta=25℃) | 4 | ||
| Output high voltage | VOH | 14.95 | V | /IO/<1uA, VDD=15V (Ta=25℃) | 4 | ||
| Output low voltage | VOL | 0.05 | V | /IO/<1uA, VDD=5V (Ta=25℃) | 4 | ||
| Input current | IIN | 0.01 | 1 | uA | VIN=VDD or VSS, VDD=18V (Ta=25℃) | 4 | |
| Operating (quiescent) current | IDD | 0.01 | 1 | uA | VIN=VDD or VSS, VDD=5V (Ta=25℃) | 4 | |
| Operating (quiescent) current | IDD | 0.01 | 2 | uA | VIN=VDD or VSS, VDD=10V (Ta=25℃) | 4 | |
| Operating (quiescent) current | IDD | 0.01 | 4 | uA | VIN=VDD or VSS, VDD=15V (Ta=25℃) | 4 | |
| Operating (quiescent) current | IDD | 0.01 | 20 | uA | VIN=VDD or VSS, VDD=18V (Ta=25℃) | 4 | |
| Supply voltage (absolute maximum) | VDD | -0.5 | 18 | V | 2 | ||
| Input voltage (absolute maximum) | VIN | -0.5 | V | Min -0.5 V relative to VSS; max is VDD+0.5 V (VDD-referenced, no fixed number printed) | 2 | ||
| Power dissipation | PD | 500 | mW | 2 | |||
| Operating temperature (absolute maximum) | TA | -45 | 85 | ℃ | 2 | ||
| Storage temperature | Ts | -65 | 150 | ℃ | 2 | ||
| Lead soldering temperature | TW | 260 | ℃ | 10 s | 2 | ||
| Operating voltage (recommended) | VDD | 3 | 15 | V | 3 | ||
| Input/output voltage (recommended) | VIN、Vo | 0 | V | Upper limit is VDD (VDD-referenced, no fixed number printed) | 3 | ||
| Operating temperature (recommended) | TA | 0 | 60 | °C | 3 |
CAD (KiCad official)
- Symbol:
CD40106DMT - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd40106dmt-etched.step/cd40106dmt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd40106dmt.step/cd40106dmt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (10 pp, sha256
594116187d11de98, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).