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CD40106DM

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HGSEMI Inverters, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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cd40106dm-hero.glb cd40106dm: hero GLB from the etched model (keeps the MPN mark) · Ray 13d ago
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CD40106DM

HGSEMI · Inverters · SOP-14

CD40106DM from HGSEMI, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Input of Schmitt inverter 1; the datasheet gives the input voltage range as 0 to VDD (recommended), with absolute limits of -0.5 V to VDD+0.5 V.
2 Y1 output Output of Schmitt inverter 1, which is the logical inverse of A1 per the truth table (A low gives Y high, A high gives Y low).
3 A2 input Input of Schmitt inverter 2; the datasheet gives the input voltage range as 0 to VDD (recommended), with absolute limits of -0.5 V to VDD+0.5 V.
4 Y2 output Output of Schmitt inverter 2, which is the logical inverse of A2 per the truth table (A low gives Y high, A high gives Y low).
5 A3 input Input of Schmitt inverter 3; the datasheet gives the input voltage range as 0 to VDD (recommended), with absolute limits of -0.5 V to VDD+0.5 V.
6 Y3 output Output of Schmitt inverter 3, which is the logical inverse of A3 per the truth table (A low gives Y high, A high gives Y low).
7 VSS power_in Negative supply / circuit ground reference for the device; the datasheet's input and output voltage limits are referenced to VSS.
8 Y4 output Output of Schmitt inverter 4, which is the logical inverse of A4 per the truth table (A low gives Y high, A high gives Y low).
9 A4 input Input of Schmitt inverter 4; the datasheet gives the input voltage range as 0 to VDD (recommended), with absolute limits of -0.5 V to VDD+0.5 V.
10 Y5 output Output of Schmitt inverter 5, which is the logical inverse of A5 per the truth table (A low gives Y high, A high gives Y low).
11 A5 input Input of Schmitt inverter 5; the datasheet gives the input voltage range as 0 to VDD (recommended), with absolute limits of -0.5 V to VDD+0.5 V.
12 Y6 output Output of Schmitt inverter 6, which is the logical inverse of A6 per the truth table (A low gives Y high, A high gives Y low).
13 A6 input Input of Schmitt inverter 6; the datasheet gives the input voltage range as 0 to VDD (recommended), with absolute limits of -0.5 V to VDD+0.5 V.
14 VDD power_in Positive supply pin; the recommended operating range is 3 V to 15 V, with an absolute maximum of 18 V (-0.5 V to 18 V).

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD40106DM
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd40106dm-etched.step / cd40106dm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd40106dm.step / cd40106dm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (10 pp, sha256 594116187d11de98, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF