component
CD40106DE
Public Made by Adomby adom
HGSEMI Flip Flops, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD40106DE
HGSEMI · Flip Flops · DIP-14
CD40106DE from HGSEMI, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Schmitt-trigger inverter input A1; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 2 | Y1 | output | Inverter output Y1, which is the logic inverse of input A1 per the truth table (A low gives Y high, A high gives Y low). |
| 3 | A2 | input | Schmitt-trigger inverter input A2; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 4 | Y2 | output | Inverter output Y2, which is the logic inverse of input A2 per the truth table (A low gives Y high, A high gives Y low). |
| 5 | A3 | input | Schmitt-trigger inverter input A3; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 6 | Y3 | output | Inverter output Y3, which is the logic inverse of input A3 per the truth table (A low gives Y high, A high gives Y low). |
| 7 | VSS | power_in | Negative supply / ground reference pin for the device; recommended operating range is referenced to VSS with VDD of 3 V to 15 V. |
| 8 | Y4 | output | Inverter output Y4, which is the logic inverse of input A4 per the truth table (A low gives Y high, A high gives Y low). |
| 9 | A4 | input | Schmitt-trigger inverter input A4; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 10 | Y5 | output | Inverter output Y5, which is the logic inverse of input A5 per the truth table (A low gives Y high, A high gives Y low). |
| 11 | A5 | input | Schmitt-trigger inverter input A5; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 12 | Y6 | output | Inverter output Y6, which is the logic inverse of input A6 per the truth table (A low gives Y high, A high gives Y low). |
| 13 | A6 | input | Schmitt-trigger inverter input A6; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 14 | VDD | power_in | Positive supply pin; recommended operating range is 3 V to 15 V, with an absolute maximum of -0.5 V to 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating supply voltage (recommended) | VDD | 3 | 15 | V | 3 | ||
| Input/output voltage (recommended) | VIN, Vo | 0 | V | max printed as VDD | 3 | ||
| Operating temperature (recommended) | TA | 0 | 60 | °C | 3 | ||
| Supply voltage (absolute maximum) | VDD | -0.5 | 18 | V | 2 | ||
| Input voltage (absolute maximum) | VIN | -0.5 | V | min referenced to VSS; max printed as VDD+0.5 V (garbled as -VDD+0.5V) | 2 | ||
| Power dissipation (absolute maximum) | PD | 500 | mW | 2 | |||
| Operating temperature (absolute maximum) | TA | -45 | 85 | °C | 2 | ||
| Storage temperature (absolute maximum) | Ts | -65 | 150 | °C | 2 | ||
| Lead soldering temperature (absolute maximum) | TW | 260 | °C | 10 s | 2 | ||
| High-level output voltage | VOH | 4.95 | V | /IO/<1uA; VDD=5 V | 4 | ||
| High-level output voltage | VOH | 9.95 | V | /IO/<1uA; VDD=10 V | 4 | ||
| High-level output voltage | VOH | 14.95 | V | /IO/<1uA; VDD=15 V | 4 | ||
| Low-level output voltage | VOL | 0.05 | V | /IO/<1uA; VDD=5 V | 4 | ||
| Input current | IIN | 1 | uA | VIN=VDD or VSS; VDD=18 V | 4 | ||
| Quiescent (operating) supply current | IDD | 1 | uA | VIN=VDD or VSS; VDD=5 V | 4 | ||
| Quiescent (operating) supply current | IDD | 2 | uA | VIN=VDD or VSS; VDD=10 V | 4 | ||
| Quiescent (operating) supply current | IDD | 4 | uA | VIN=VDD or VSS; VDD=15 V | 4 | ||
| Quiescent (operating) supply current | IDD | 20 | uA | VIN=VDD or VSS; VDD=18 V | 4 |
CAD (KiCad official)
- Symbol:
CD40106DE - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
cd40106de-etched.step/cd40106de-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd40106de.step/cd40106de.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (10 pp, sha256
594116187d11de98, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD40106DE
**HGSEMI** · Flip Flops · DIP-14
CD40106DE from HGSEMI, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Schmitt-trigger inverter input A1; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 2 | Y1 | output | Inverter output Y1, which is the logic inverse of input A1 per the truth table (A low gives Y high, A high gives Y low). |
| 3 | A2 | input | Schmitt-trigger inverter input A2; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 4 | Y2 | output | Inverter output Y2, which is the logic inverse of input A2 per the truth table (A low gives Y high, A high gives Y low). |
| 5 | A3 | input | Schmitt-trigger inverter input A3; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 6 | Y3 | output | Inverter output Y3, which is the logic inverse of input A3 per the truth table (A low gives Y high, A high gives Y low). |
| 7 | VSS | power_in | Negative supply / ground reference pin for the device; recommended operating range is referenced to VSS with VDD of 3 V to 15 V. |
| 8 | Y4 | output | Inverter output Y4, which is the logic inverse of input A4 per the truth table (A low gives Y high, A high gives Y low). |
| 9 | A4 | input | Schmitt-trigger inverter input A4; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 10 | Y5 | output | Inverter output Y5, which is the logic inverse of input A5 per the truth table (A low gives Y high, A high gives Y low). |
| 11 | A5 | input | Schmitt-trigger inverter input A5; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 12 | Y6 | output | Inverter output Y6, which is the logic inverse of input A6 per the truth table (A low gives Y high, A high gives Y low). |
| 13 | A6 | input | Schmitt-trigger inverter input A6; input voltage must stay within -0.5 V to VDD+0.5 V (absolute maximum ratings). |
| 14 | VDD | power_in | Positive supply pin; recommended operating range is 3 V to 15 V, with an absolute maximum of -0.5 V to 18 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating supply voltage (recommended) | VDD | 3 | | 15 | V | | 3 |
| Input/output voltage (recommended) | VIN, Vo | 0 | | | V | max printed as VDD | 3 |
| Operating temperature (recommended) | TA | 0 | | 60 | °C | | 3 |
| Supply voltage (absolute maximum) | VDD | -0.5 | | 18 | V | | 2 |
| Input voltage (absolute maximum) | VIN | -0.5 | | | V | min referenced to VSS; max printed as VDD+0.5 V (garbled as -VDD+0.5V) | 2 |
| Power dissipation (absolute maximum) | PD | | | 500 | mW | | 2 |
| Operating temperature (absolute maximum) | TA | -45 | | 85 | °C | | 2 |
| Storage temperature (absolute maximum) | Ts | -65 | | 150 | °C | | 2 |
| Lead soldering temperature (absolute maximum) | TW | | | 260 | °C | 10 s | 2 |
| High-level output voltage | VOH | 4.95 | | | V | /IO/<1uA; VDD=5 V | 4 |
| High-level output voltage | VOH | 9.95 | | | V | /IO/<1uA; VDD=10 V | 4 |
| High-level output voltage | VOH | 14.95 | | | V | /IO/<1uA; VDD=15 V | 4 |
| Low-level output voltage | VOL | | | 0.05 | V | /IO/<1uA; VDD=5 V | 4 |
| Input current | IIN | | | 1 | uA | VIN=VDD or VSS; VDD=18 V | 4 |
| Quiescent (operating) supply current | IDD | | | 1 | uA | VIN=VDD or VSS; VDD=5 V | 4 |
| Quiescent (operating) supply current | IDD | | | 2 | uA | VIN=VDD or VSS; VDD=10 V | 4 |
| Quiescent (operating) supply current | IDD | | | 4 | uA | VIN=VDD or VSS; VDD=15 V | 4 |
| Quiescent (operating) supply current | IDD | | | 20 | uA | VIN=VDD or VSS; VDD=18 V | 4 |
## CAD (KiCad official)
- Symbol: `CD40106DE`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files: `cd40106de-etched.step` / `cd40106de-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd40106de.step` / `cd40106de.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758163010437832704) (10 pp, sha256 `594116187d11de98`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd40106de-datasheet.pdf)