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CD40106BM96

Public Made by Adom

by adom

Texas Instruments Inverters, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cd40106bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cd40106bm96-etched.fit.json cd40106bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd40106bm96-etched.glb cd40106bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
cd40106bm96-etched.step cd40106bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
cd40106bm96.glb Publish 0.1.0 · Ray
cd40106bm96.kicad_mod Publish 0.1.0 · Ray
cd40106bm96.kicad_sym Publish 0.1.0 · Ray
cd40106bm96.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cd40106bm96.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json cd40106bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
README.md cd40106bm96: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CD40106BM96

Texas Instruments · Inverters · SOIC-14

CD40106BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Schmitt-trigger inverter #1 input. High-impedance CMOS gate input; input current typ. ±10^-5 µA, max ±0.1 µA at VDD=18 V. Switches at positive-going threshold Vp and negative-going threshold Vn with hysteresis Vh = Vp - Vn.
2 1Y output Schmitt-trigger inverter #1 output (logical inverse of 1A). CMOS push-pull; IOL min 0.51 mA at VDD=5 V, IOH min -0.51 mA. VOL max 0.05 V, VOH min VDD-0.05 V.
3 2A input Schmitt-trigger inverter #2 input. See 1A for electrical characteristics.
4 2Y output Schmitt-trigger inverter #2 output (logical inverse of 2A).
5 3A input Schmitt-trigger inverter #3 input. See 1A for electrical characteristics.
6 3Y output Schmitt-trigger inverter #3 output (logical inverse of 3A).
7 VSS power_in Negative supply / ground reference. Typically tied to 0 V. All input voltages referenced to VSS.
8 4Y output Schmitt-trigger inverter #4 output (logical inverse of 4A).
9 4A input Schmitt-trigger inverter #4 input. See 1A for electrical characteristics.
10 5Y output Schmitt-trigger inverter #5 output (logical inverse of 5A).
11 5A input Schmitt-trigger inverter #5 input. See 1A for electrical characteristics.
12 6Y output Schmitt-trigger inverter #6 output (logical inverse of 6A).
13 6A input Schmitt-trigger inverter #6 input. See 1A for electrical characteristics.
14 VDD power_in Positive supply. Recommended operating range 3 V to 18 V. Absolute maximum -0.5 V to +20 V. Quiescent supply current IDD typ. 0.02 µA (max 1 µA at VDD=5 V, 25°C).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • CD40106BM96
  • CD40106BM96E4
  • CD40106BM96G4
  • CD40106BM96BMG4
  • CD40106BM96BMT
  • CD40106BM96BMTG4
  • CD40106BM96BE
  • CD40106BM96BEE4
  • CD40106BM96BF
  • CD40106BM96BF3A
  • CD40106BM96BNSR
  • CD40106BM96BNSRG4
  • CD40106BM96BPW
  • CD40106BM96BPWG4
  • CD40106BM96BPWR
  • CD40106BM96BPWRE4
  • CD40106BM96BK

CAD (KiCad official)

  • Symbol: CD40106BM96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd40106bm96-etched.step / cd40106bm96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd40106bm96.step / cd40106bm96.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cd40106bm96.step 195 KB You want the bare part, or you mark your own boards.
cd40106bm96-etched.step 2.8 MB You want the part with CD40106BM96 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 693 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (17 pp, sha256 c36e02fe6a525a03, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF