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README

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CD40103BE

lingxingic · Counters, Dividers · DIP-16

CD40103BE from lingxingic, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CP input Clock input, edge-triggered on the LOW-to-HIGH transition; the counter decrements on each positive-going CP transition.
2 MR input Asynchronous master reset, active LOW; when LOW it clears the counter to its maximum count (decimal 255) regardless of the other inputs.
3 TE input Terminal enable, active LOW; counting is inhibited while TE is HIGH, and TC goes LOW at zero count only when TE is LOW.
4 P0 input Jam input 0, least significant bit of the 8-bit preset word P0 to P7; inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC.
5 P1 input Jam input 1, bit 1 of the 8-bit preset word P0 to P7; inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC.
6 P2 input Jam input 2, bit 2 of the 8-bit preset word P0 to P7; inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC.
7 P3 input Jam input 3, bit 3 of the 8-bit preset word P0 to P7; inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC.
8 GND power_in Ground (0 V) reference for all voltages.
9 PL input Asynchronous preset enable, active LOW; when LOW, the jam data P0 to P7 is asynchronously forced into the counter regardless of PE, TE or CP.
10 P4 input Jam input 4, bit 4 of the 8-bit preset word P0 to P7; inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC.
11 P5 input Jam input 5, bit 5 of the 8-bit preset word P0 to P7; inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC.
12 P6 input Jam input 6, bit 6 of the 8-bit preset word P0 to P7; inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC.
13 P7 input Jam input 7, most significant bit of the 8-bit preset word P0 to P7; inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC.
14 TC output Terminal count output, active LOW; goes LOW when the count reaches zero (if TE is LOW) and stays LOW for one full clock period, and is used for cascading.
15 PE input Synchronous preset enable, active LOW; when LOW, the jam data is clocked into the counter on the next LOW-to-HIGH CP transition.
16 VCC power_in Positive supply voltage; recommended supply range is 2.0 V to 6.0 V with respect to GND.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V voltages referenced to GND 9
input clamping current IIK -20 20 mA VI<-0.5V or VI>VCC+0.5V 9
output clamping current IOK -20 20 mA VO<-0.5V or VO>VCC+0.5V 9
output current IO -25 25 mA VO=-0.5V to VCC+0.5V 9
supply current ICC 50 mA 9
ground current IGND -50 mA 9
storage temperature Tstg -65 150 ℃ 9
total power dissipation Ptot 500 mW 9
soldering temperature (DIP) TL 245 ℃ 10s, DIP 9
supply voltage VCC 2 5 6 V 9
input voltage VI 0 V max printed as VCC (not numeric) 9
output voltage VO 0 V max printed as VCC (not numeric) 9
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 9
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 9
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 9
ambient temperature Tamb -40 125 ℃ 9
HIGH-level input voltage VIH 1.5 1.2 V Tamb=25℃; VCC=2.0V 10
HIGH-level input voltage VIH 3.15 2.4 V Tamb=25℃; VCC=4.5V 10
HIGH-level input voltage VIH 4.2 3.2 V Tamb=25℃; VCC=6.0V 10
LOW-level input voltage VIL 0.8 0.5 V Tamb=25℃; VCC=2.0V 10
LOW-level input voltage VIL 2.1 1.35 V Tamb=25℃; VCC=4.5V 10
LOW-level input voltage VIL 2.8 1.8 V Tamb=25℃; VCC=6.0V 10
HIGH-level output voltage VOH 1.9 2 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 10
HIGH-level output voltage VOH 4.4 4.5 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 10
HIGH-level output voltage VOH 5.9 6 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 10
HIGH-level output voltage VOH 3.98 4.32 V Tamb=25℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V 10
HIGH-level output voltage VOH 5.48 5.81 V Tamb=25℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V 10
LOW-level output voltage VOL 0 0.1 V Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 10
LOW-level output voltage VOL 0.15 0.26 V Tamb=25℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V 10
LOW-level output voltage VOL 0.16 0.26 V Tamb=25℃; VI=VIH or VIL; IO=5.2mA; VCC=6.0V 10
input leakage current II -1 1 uA Tamb=25℃; VI=VCC or GND; VCC=6.0V 10
supply current ICC 8 uA Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V 10
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +125℃; VCC=2.0V 12
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +125℃; VCC=4.5V 12
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +125℃; VCC=6.0V 12
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +125℃; VCC=2.0V 12
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +125℃; VCC=4.5V 12
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +125℃; VCC=6.0V 12
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 12
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 12
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 12
HIGH-level output voltage VOH 3.7 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V 12
HIGH-level output voltage VOH 5.2 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V 12
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 12
LOW-level output voltage VOL 0.4 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V 12
input leakage current II -1 1 uA Tamb=-40℃ to +125℃; VI=VCC or GND; VCC=6.0V 12
supply current ICC 160 uA Tamb=-40℃ to +125℃; VI=VCC or GND; IO=0A; VCC=6.0V 12
maximum frequency fmax 3 10 MHz Tamb=25℃; tr=tf=6ns; CL=50pF; VCC=2.0V; see Figure 6 14
maximum frequency fmax 15 29 MHz Tamb=25℃; tr=tf=6ns; CL=50pF; VCC=4.5V; see Figure 6 14
maximum frequency fmax 18 35 MHz Tamb=25℃; tr=tf=6ns; CL=50pF; VCC=6.0V; see Figure 6 14
maximum frequency fmax 2 MHz Tamb=-40℃ to +125℃; tr=tf=6ns; CL=50pF; VCC=2.0V; see Figure 6 18
maximum frequency fmax 10 MHz Tamb=-40℃ to +125℃; tr=tf=6ns; CL=50pF; VCC=4.5V; see Figure 6 18
maximum frequency fmax 12 MHz Tamb=-40℃ to +125℃; tr=tf=6ns; CL=50pF; VCC=6.0V; see Figure 6 18

CAD (KiCad official)

  • Symbol: CD40103BE
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: cd40103be-etched.step / cd40103be-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd40103be.step / cd40103be.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (26 pp, sha256 9b3174499e30b9c4, retrieved 2026-10-14, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF