component
CD4009UBPWR
Public Made by Adomby adom
Texas Instruments Translators, Level Shifters, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownCD4009UBPWR
Texas Instruments · Translators, Level Shifters · TSSOP-16
CD4009UBPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Logic-level (DTL/TTL) output supply, recommended 3 V to VDD. |
| 2 | G | output | Inverted output of buffer A (G = A̅), swings between VSS and VCC. |
| 3 | A | input | Buffer input A, recommended input range VCC to VDD, absolute maximum -0.5 V to VDD+0.5 V. |
| 4 | H | output | Inverted output of buffer B (H = B̅), swings between VSS and VCC. |
| 5 | B | input | Buffer input B, recommended input range VCC to VDD, absolute maximum -0.5 V to VDD+0.5 V. |
| 6 | I | output | Inverted output of buffer C (I = C̅), swings between VSS and VCC. |
| 7 | C | input | Buffer input C, recommended input range VCC to VDD, absolute maximum -0.5 V to VDD+0.5 V. |
| 8 | VSS | power_in | Ground / negative supply reference for all voltages. |
| 9 | D | input | Buffer input D, recommended input range VCC to VDD, absolute maximum -0.5 V to VDD+0.5 V. |
| 10 | J | output | Inverted output of buffer D (J = D̅), swings between VSS and VCC. |
| 11 | E | input | Buffer input E, recommended input range VCC to VDD, absolute maximum -0.5 V to VDD+0.5 V. |
| 12 | K | output | Inverted output of buffer E (K = E̅), swings between VSS and VCC. |
| 13 | NC | unconnected | No connection. |
| 14 | F | input | Buffer input F, recommended input range VCC to VDD, absolute maximum -0.5 V to VDD+0.5 V. |
| 15 | L | output | Inverted output of buffer F (L = F̅), swings between VSS and VCC. |
| 16 | VDD | power_in | Positive CMOS supply, recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature range | -55 | 125 | °C | Op temp for CD4009UBPWR per Package Option Addendum (TSSOP PW, 16 pins) | 5 |
CAD (KiCad official)
- Symbol:
CD4009UBPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4009ubpwr-etched.step/cd4009ubpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4009ubpwr.step/cd4009ubpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
1d1c975eae5e9508, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).