CD4001UBM96

@@ -38,13 +38,13 @@         "number": "1",         "name": "A",         "type": "input",-        "description": "Input A to NOR gate 1 (output J = A+B); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 \u00b5A at 18 V over the full package-temperature range (100 nA at 18 V, 25\u00b0C)."+        "description": "Input A to NOR gate 1 (output J = A+B); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 µA at 18 V over the full package-temperature range (100 nA at 18 V, 25°C)."       },       {         "number": "2",         "name": "B",         "type": "input",-        "description": "Input B to NOR gate 1 (output J = A+B); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 \u00b5A at 18 V over the full package-temperature range (100 nA at 18 V, 25\u00b0C)."+        "description": "Input B to NOR gate 1 (output J = A+B); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 µA at 18 V over the full package-temperature range (100 nA at 18 V, 25°C)."       },       {         "number": "3",@@ -62,13 +62,13 @@         "number": "5",         "name": "C",         "type": "input",-        "description": "Input C to NOR gate 2 (output K = C+D); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 \u00b5A at 18 V over the full package-temperature range (100 nA at 18 V, 25\u00b0C)."+        "description": "Input C to NOR gate 2 (output K = C+D); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 µA at 18 V over the full package-temperature range (100 nA at 18 V, 25°C)."       },       {         "number": "6",         "name": "D",         "type": "input",-        "description": "Input D to NOR gate 2 (output K = C+D); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 \u00b5A at 18 V over the full package-temperature range (100 nA at 18 V, 25\u00b0C)."+        "description": "Input D to NOR gate 2 (output K = C+D); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 µA at 18 V over the full package-temperature range (100 nA at 18 V, 25°C)."       },       {         "number": "7",@@ -80,13 +80,13 @@         "number": "8",         "name": "E",         "type": "input",-        "description": "Input E to NOR gate 3 (output L = E+F); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 \u00b5A at 18 V over the full package-temperature range (100 nA at 18 V, 25\u00b0C)."+        "description": "Input E to NOR gate 3 (output L = E+F); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 µA at 18 V over the full package-temperature range (100 nA at 18 V, 25°C)."       },       {         "number": "9",         "name": "F",         "type": "input",-        "description": "Input F to NOR gate 3 (output L = E+F); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 \u00b5A at 18 V over the full package-temperature range (100 nA at 18 V, 25\u00b0C)."+        "description": "Input F to NOR gate 3 (output L = E+F); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 µA at 18 V over the full package-temperature range (100 nA at 18 V, 25°C)."       },       {         "number": "10",@@ -104,13 +104,13 @@         "number": "12",         "name": "G",         "type": "input",-        "description": "Input G to NOR gate 4 (output M = G+H); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 \u00b5A at 18 V over the full package-temperature range (100 nA at 18 V, 25\u00b0C)."+        "description": "Input G to NOR gate 4 (output M = G+H); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 µA at 18 V over the full package-temperature range (100 nA at 18 V, 25°C)."       },       {         "number": "13",         "name": "H",         "type": "input",-        "description": "Input H to NOR gate 4 (output M = G+H); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 \u00b5A at 18 V over the full package-temperature range (100 nA at 18 V, 25\u00b0C)."+        "description": "Input H to NOR gate 4 (output M = G+H); accepts an input voltage of -0.5 V to VDD+0.5 V and is protected by a CMOS protection network, with maximum input current of 1 µA at 18 V over the full package-temperature range (100 nA at 18 V, 25°C)."       },       {         "number": "14",@@ -197,5 +197,8 @@     "docs/cd4001ubm96-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file