component
CD4001BM
Public Made by Adomby adom
Slkor(SLKORMICRO Elec.) Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| cd4001bm-etched.glb | 5d ago |
| cd4001bm-etched.step | 5d ago |
| cd4001bm-hero.glb | 5d ago |
| cd4001bm-hero.overlay.json | 5d ago |
| cd4001bm.glb | 5d ago |
| cd4001bm.kicad_mod | 5d ago |
| cd4001bm.kicad_sym | 5d ago |
| cd4001bm.lbr | 5d ago |
| cd4001bm.step | 5d ago |
| package.json | 5d ago |
| page.json | 5d ago |
| README.md | 5d ago |
CD4001BM
Slkor(SLKORMICRO Elec.) · Logic Gates · SOIC-14
CD4001BM from Slkor(SLKORMICRO Elec.), in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 input A; protected by diodes to VDD and VSS, with NOR output J = NOT(A+B). |
| 2 | B1 | input | Gate 1 input B; protected by diodes to VDD and VSS, with NOR output J = NOT(A+B). |
| 3 | J1 | output | Gate 1 buffered NOR output (J = NOT(A+B)), with B-series standard output drive. |
| 4 | J2 | output | Gate 2 buffered NOR output (J = NOT(A+B)), with B-series standard output drive. |
| 5 | A2 | input | Gate 2 input A; protected by diodes to VDD and VSS. |
| 6 | B2 | input | Gate 2 input B; protected by diodes to VDD and VSS. |
| 7 | VSS | power_in | Ground / negative supply reference; all voltages are measured with respect to VSS. |
| 8 | A3 | input | Gate 3 input A; protected by diodes to VDD and VSS. |
| 9 | B3 | input | Gate 3 input B; protected by diodes to VDD and VSS. |
| 10 | J3 | output | Gate 3 buffered NOR output (J = NOT(A+B)), with B-series standard output drive. |
| 11 | J4 | output | Gate 4 buffered NOR output (J = NOT(A+B)), with B-series standard output drive. |
| 12 | A4 | input | Gate 4 input A; protected by diodes to VDD and VSS. |
| 13 | B4 | input | Gate 4 input B; protected by diodes to VDD and VSS. |
| 14 | VDD | power_in | Positive supply; operating range 3 VDC to 15 VDC, absolute maximum -0.5 V to +18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Slkor(SLKORMICRO Elec.) |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage operating range (VDD) | VDD | 3 | 15 | V | 2 | ||
| Operating temperature range | -55 | 125 | °C | 2 | |||
| Supply voltage VDD range | VDD | -0.5 | 18 | V | 2 | ||
| Input voltage | VIN | -0.5 | V | max printed as VDD + 0.5 V | 2 | ||
| Storage temperature | TS | -65 | 150 | °C | 2 | ||
| Lead temperature (soldering) | TL | 260 | °C | soldering, 10 (time unit missing in text) | 2 | ||
| Quiescent current IDD | IDD | 0.25 | mA | VDD = 5 V, VIN = VDD or VSS, TA = -55°C | 2 | ||
| Quiescent current IDD | IDD | 0.004 | 0.25 | mA | VDD = 5 V, VIN = VDD or VSS, TA = 25°C | 2 | |
| Quiescent current IDD | IDD | 7.5 | mA | VDD = 5 V, VIN = VDD or VSS, TA = 125°C | 2 | ||
| Quiescent current IDD | IDD | 0.5 | mA | VDD = 10 V, VIN = VDD or VSS, TA = -55°C | 2 | ||
| Quiescent current IDD | IDD | 0.005 | 0.5 | mA | VDD = 10 V, VIN = VDD or VSS, TA = 25°C | 2 | |
| Quiescent current IDD | IDD | 15 | mA | VDD = 10 V, VIN = VDD or VSS, TA = 125°C | 2 | ||
| Quiescent current IDD | IDD | 1 | mA | VDD = 15 V, VIN = VDD or VSS, TA = -55°C | 2 | ||
| Quiescent current IDD | IDD | 0.006 | 1 | mA | VDD = 15 V, VIN = VDD or VSS, TA = 25°C | 2 | |
| Quiescent current IDD | IDD | 30 | mA | VDD = 15 V, VIN = VDD or VSS, TA = 125°C | 2 | ||
| Output low voltage VOL | VOL | 0 | 0.05 | V | VDD = 5 V, /IO/ k 1 mA (as extracted), TA = 25°C | 2 | |
| Output high voltage VOH | VOH | 4.95 | 5 | V | VDD = 5 V, /IO/ k 1 mA (as extracted), TA = 25°C | 2 | |
| Output high voltage VOH | VOH | 9.95 | 10 | V | VDD = 10 V, /IO/ k 1 mA (as extracted), TA = 25°C | 2 | |
| Output high voltage VOH | VOH | 14.95 | 15 | V | VDD = 15 V, /IO/ k 1 mA (as extracted), TA = 25°C | 2 | |
| Output low (sink) current IOL | IOL | 0.64 | mA | VDD = 5 V, VO = 0.4 V, TA = -55°C | 2 | ||
| Output low (sink) current IOL | IOL | 0.51 | 0.88 | mA | VDD = 5 V, VO = 0.4 V, TA = 25°C | 2 | |
| Output low (sink) current IOL | IOL | 0.36 | mA | VDD = 5 V, VO = 0.4 V, TA = 125°C | 2 | ||
| Output low (sink) current IOL | IOL | 1.6 | mA | VDD = 10 V, VO = 0.5 V, TA = -55°C | 2 | ||
| Output low (sink) current IOL | IOL | 1.3 | 2.25 | mA | VDD = 10 V, VO = 0.5 V, TA = 25°C | 2 | |
| Output low (sink) current IOL | IOL | 0.9 | mA | VDD = 10 V, VO = 0.5 V, TA = 125°C | 2 | ||
| Output low (sink) current IOL | IOL | 4.2 | mA | VDD = 15 V, VO = 1.5 V, TA = -55°C | 2 | ||
| Output low (sink) current IOL | IOL | 3.4 | 8.8 | mA | VDD = 15 V, VO = 1.5 V, TA = 25°C | 2 | |
| Output low (sink) current IOL | IOL | 2.4 | mA | VDD = 15 V, VO = 1.5 V, TA = 125°C | 2 | ||
| Output high (source) current IOH | IOH | -0.64 | mA | VDD = 5 V, VO = 4.6 V, TA = -55°C | 2 | ||
| Output high (source) current IOH | IOH | -0.51 | -0.88 | mA | VDD = 5 V, VO = 4.6 V, TA = 25°C | 2 | |
| Output high (source) current IOH | IOH | -0.36 | mA | VDD = 5 V, VO = 4.6 V, TA = 125°C | 2 | ||
| Output high (source) current IOH | IOH | -1.6 | mA | VDD = 10 V, VO = 9.5 V, TA = -55°C | 2 | ||
| Output high (source) current IOH | IOH | -1.3 | -2.25 | mA | VDD = 10 V, VO = 9.5 V, TA = 25°C | 2 | |
| Output high (source) current IOH | IOH | -0.9 | mA | VDD = 10 V, VO = 9.5 V, TA = 125°C | 2 | ||
| Output high (source) current IOH | IOH | -4.2 | mA | VDD = 15 V, VO = 13.5 V, TA = -55°C | 2 | ||
| Output high (source) current IOH | IOH | -3.4 | -8.8 | mA | VDD = 15 V, VO = 13.5 V, TA = 25°C | 2 | |
| Output high (source) current IOH | IOH | -2.4 | mA | VDD = 15 V, VO = 13.5 V, TA = 125°C | 2 | ||
| Input low voltage VIL | VIL | 1.5 | V | VDD = 5 V, VO = 4.5 V, TA = -55°C | 2 | ||
| Input low voltage VIL | VIL | 2 | 1.5 | V | VDD = 5 V, VO = 4.5 V, TA = 25°C | 2 | |
| Input low voltage VIL | VIL | 3 | V | VDD = 10 V, VO = 9.0 V, TA = -55°C | 2 | ||
| Input low voltage VIL | VIL | 4 | 3 | V | VDD = 10 V, VO = 9.0 V, TA = 25°C | 2 | |
| Input low voltage VIL | VIL | 4 | V | VDD = 15 V, VO = 13.5 V, TA = -55°C | 2 | ||
| Input low voltage VIL | VIL | 6 | 4 | V | VDD = 15 V, VO = 13.5 V, TA = 25°C | 2 | |
| Input high voltage VIH | VIH | 3.5 | V | VDD = 5 V, VO = 0.5 V, TA = -55°C | 2 | ||
| Input high voltage VIH | VIH | 3.5 | 3 | V | VDD = 5 V, VO = 0.5 V, TA = 25°C | 2 | |
| Input high voltage VIH | VIH | 7 | V | VDD = 10 V, VO = 1.0 V, TA = -55°C | 2 | ||
| Input high voltage VIH | VIH | 7 | 6 | V | VDD = 10 V, VO = 1.0 V, TA = 25°C | 2 | |
| Input high voltage VIH | VIH | 11 | V | VDD = 15 V, VO = 1.5 V, TA = -55°C | 2 | ||
| Input high voltage VIH | VIH | 11 | 9 | V | VDD = 15 V, VO = 1.5 V, TA = 25°C | 2 |
CAD (KiCad official)
- Symbol:
CD4001BM - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd4001bm-etched.step/cd4001bm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4001bm.step/cd4001bm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Slkor(SLKORMICRO Elec.) datasheet (4 pp, sha256
36e4dd9d654dda1d, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).