component
CD4001BM-TD
Public Made by Adomby adom
TDSEMIC Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4001BM-TD
TDSEMIC · Logic Gates · SOP-14
CD4001BM-TD from TDSEMIC, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of gate 1 (NOR gate 1 input; unused inputs must be tied to VDD, VSS or another input). |
| 2 | 1B | input | Data input B of gate 1 (NOR gate 1 input; unused inputs must be tied to VDD, VSS or another input). |
| 3 | 1Y | output | Data output of gate 1, fully buffered NOR output. |
| 4 | 2Y | output | Data output of gate 2, fully buffered NOR output. |
| 5 | 2A | input | Data input A of gate 2 (NOR gate 2 input; unused inputs must be tied to VDD, VSS or another input). |
| 6 | 2B | input | Data input B of gate 2 (NOR gate 2 input; unused inputs must be tied to VDD, VSS or another input). |
| 7 | VSS | power_in | Ground (0V), the reference for the VDD supply. |
| 8 | 3A | input | Data input A of gate 3 (NOR gate 3 input; unused inputs must be tied to VDD, VSS or another input). |
| 9 | 3B | input | Data input B of gate 3 (NOR gate 3 input; unused inputs must be tied to VDD, VSS or another input). |
| 10 | 3Y | output | Data output of gate 3, fully buffered NOR output. |
| 11 | 4Y | output | Data output of gate 4, fully buffered NOR output. |
| 12 | 4A | input | Data input A of gate 4 (NOR gate 4 input; unused inputs must be tied to VDD, VSS or another input). |
| 13 | 4B | input | Data input B of gate 4 (NOR gate 4 input; unused inputs must be tied to VDD, VSS or another input). |
| 14 | VDD | power_in | Supply voltage, recommended operating range 3V to 15V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TDSEMIC |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD4001BM-TD - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4001bm-td-etched.step/cd4001bm-td-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4001bm-td.step/cd4001bm-td.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TDSEMIC datasheet (9 pp, sha256
9ffc32688937254f, retrieved 2026-10-09, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).