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CD143A-SR05LC
Public Made by Adomby adom
BOURNS ESD And Surge Protection (TVS/ESD), SOT-143. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD143A-SR05LC
BOURNS · ESD And Surge Protection (TVS/ESD) · SOT-143
CD143A-SR05LC from BOURNS, in a SOT-143. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Must be connected to the local ground used by the protected device and must never be left floating. |
| 2 | I/O | bidirectional | Protected data line I/O; clamps transients to 9.0 V max at 5 A and 12.5 V max at 13 A, with 5.0 V working peak voltage and 3 pF max capacitance to ground. |
| 3 | I/O | bidirectional | Protected data line I/O; clamps transients to 9.0 V max at 5 A and 12.5 V max at 13 A, with 5.0 V working peak voltage and 3 pF max capacitance to ground. |
| 4 | REF | power_in | Must be connected to the 5 V supply rail of the protected device and must never be left floating; an optional 0.1 µF bypass capacitor to ground improves ESD performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BOURNS |
| Package | SOT-143 |
| Category | Circuit Protection |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Current (tp= 8/20 μs) | IPP | 13 | A | tp= 8/20 μs | 1 | ||
| Operating Temperature | TJ | -55 | 125 | °C | 1 | ||
| Storage Temperature | TSTG | -55 | 150 | °C | 1 | ||
| Forward Voltage | Vf | 1 | V | If = 15 mA, Pin 1-4 | 1 | ||
| Breakdown Voltage Minimum | VBR | 6.1 | V | @ 2 mA | 1 | ||
| Working Peak Voltage | VWM | 5 | V | 1 | |||
| Clamping Voltage Maximum @ IP = 5 A | VC | 9 | V | @ IP = 5 A | 1 | ||
| Clamping Voltage Maximum @ IPP | VC | 12.5 | V | @ 13 A | 1 | ||
| Leakage Current @ VWM | ID | 1 | μA | @ VWM | 1 | ||
| Capacitance Maximum between I/O Pins and Ground | CIN | 3 | pF | @ VR = 0 V, f = 1 MHz | 1 |
CAD (KiCad official)
- Symbol:
CD143A-SR05LC - Footprint:
Package_TO_SOT_SMD:SOT-143 - 3D model: SOT-143 (KiCad packages3D, STEP)
- 3D model files:
cd143a-sr05lc-etched.step/cd143a-sr05lc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd143a-sr05lc.step/cd143a-sr05lc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BOURNS datasheet (6 pp, sha256
530c67ac9d50bcb1, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).