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CC8530RHAR

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Texas Instruments RF Transceiver ICs, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CC8530RHAR

Texas Instruments · RF Transceiver ICs · VQFN-40-EP(6x6)

CC8530RHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 xANTN bidirectional External antenna switch control (CC8530) or USB D- data line (CC8531); digital I/O with 4 mA source/sink.
2 xANTP bidirectional External antenna switch control (CC8530) or USB D+ data line (CC8531); digital I/O with 4 mA source/sink.
3 CS_N input Serial SPI configuration interface active-low chip select with internal pull-up.
4 SCLK bidirectional Serial SPI configuration interface clock input/output, supports up to 20 MHz; digital I/O with 4 mA source/sink.
5 MOSI bidirectional Serial SPI configuration interface master data output/slave data input; digital I/O with 4 mA source/sink.
6 MISO bidirectional Serial SPI configuration interface master data input/slave data output; digital I/O with 4 mA source/sink.
7 GIO1 bidirectional General-purpose digital I/O pin 1, configurable with PurePath Wireless Configurator; 4 mA source/sink.
8 GIO2 bidirectional General-purpose digital I/O pin 2; digital I/O with 4 mA source/sink.
9 GIO3 bidirectional General-purpose digital I/O pin 3, configurable with PurePath Wireless Configurator; 20 mA source/sink.
10 IOVDD power_in Digital power supply for the digital I/Os in the SPI interface and GIO1-GIO3.
11 RSTN input Active-low device reset with internal pull-up.
12 IOVDD power_in Digital power supply for the RSTN and MCLK digital I/O pins.
13 MCLK/GIO4 bidirectional Master clock output for external audio devices or general-purpose digital I/O pin 4; digital I/O with 4 mA source/sink.
14 BCLK/GIO5 bidirectional I2S/DSP audio interface bit clock input/output or general-purpose digital I/O pin 5; digital I/O with 4 mA source/sink.
15 WCLK/GIO6 bidirectional I2S/DSP audio interface word clock input/output or general-purpose digital I/O pin 6; digital I/O with 4 mA source/sink.
16 AD0/GIO7 bidirectional I2S/DSP audio interface data line 0 input/output or general-purpose digital I/O pin 7; digital I/O with 4 mA source/sink.
17 AD1/GIO8 bidirectional I2S/DSP audio interface data line 1 input/output or general-purpose digital I/O pin 8; digital I/O with 4 mA source/sink.
18 IOVDD power_in Digital power supply for the digital I/Os in audio interface pins BCLK through AD2.
19 AD2/GIO9 bidirectional I2S/DSP audio interface data line 2 input/output, configurable with PurePath Wireless Configurator, or general-purpose digital I/O pin 9; 20 mA source/sink.
20 AVDD power_in Analog power supply connection, 2.0-3.6 V.
21 X1 passive Crystal oscillator pin input for 48 MHz crystal or external clock input.
22 X0 passive Crystal oscillator pin output for 48 MHz crystal.
23 AVDD power_in Analog power supply connection.
24 RF_P bidirectional Positive differential RF input signal to LNA in receive mode or positive differential RF output signal from PA in transmit mode.
25 RF_N bidirectional Negative differential RF input signal to LNA in receive mode or negative differential RF output signal from PA in transmit mode.
26 AVDD power_in Analog power supply connection.
27 AVDD power_in Analog power supply connection.
28 AVDD power_in Analog power supply connection.
29 VBAT power_in Battery voltage supervisor input with threshold level programmable by external resistor to positive battery terminal, input voltage range 0-4.5 V.
30 RBIAS output External precision bias resistor for reference current output, recommended value 56 kΩ ±1%.
31 AVDD power_in Analog power supply connection for guard ring AVDD connection for digital noise isolation.
32 SCL/GIO10 bidirectional I2C master clock line must be connected to external pull-up or general-purpose digital I/O pin 10; digital I/O with 4 mA source/sink.
33 SDA/GIO11 bidirectional I2C master data line must be connected to external pull-up or general-purpose digital I/O pin 11; digital I/O with 4 mA source/sink.
34 GIO12 bidirectional General-purpose digital I/O pin 12; digital I/O with 4 mA source/sink.
35 GIO13 bidirectional General-purpose digital I/O pin 13; digital I/O with 4 mA source/sink.
36 xPAEN/GIO14 bidirectional Control external power amplifier or general-purpose digital I/O pin 14; digital I/O with 20 mA source/sink.
37 IOVDD power_in Digital power supply for SCL through GIO15 pins.
38 xLNAEN/GIO15 bidirectional Control external low-noise amplifier or general-purpose digital I/O pin 15; digital I/O with 20 mA source/sink.
39 DCPL power_out Linear voltage regulator output 1.7-1.85 V for 1 µF decoupling capacitor connection, or external digital supply input 1.62-1.98 V bypassing internal regulator for test purposes.
40 DVDD power_in Digital power supply for the internal linear voltage regulator.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-40-EP(6x6)
Category RF And Wireless
Pins 41

CAD (KiCad official)

  • Symbol: CC8530RHAR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: cc8530rhar-etched.step / cc8530rhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc8530rhar.step / cc8530rhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 f1bf16d11e543585, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF