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CC8530RHAR
Public Made by Adomby adom
Texas Instruments RF Transceiver ICs, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+77@@ -0,0 +1,77 @@+# CC8530RHAR++**Texas Instruments** · RF Transceiver ICs · VQFN-40-EP(6x6)++CC8530RHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | xANTN | bidirectional | External antenna switch control (CC8530) or USB D- data line (CC8531); digital I/O with 4 mA source/sink. |+| 2 | xANTP | bidirectional | External antenna switch control (CC8530) or USB D+ data line (CC8531); digital I/O with 4 mA source/sink. |+| 3 | CS_N | input | Serial SPI configuration interface active-low chip select with internal pull-up. |+| 4 | SCLK | bidirectional | Serial SPI configuration interface clock input/output, supports up to 20 MHz; digital I/O with 4 mA source/sink. |+| 5 | MOSI | bidirectional | Serial SPI configuration interface master data output/slave data input; digital I/O with 4 mA source/sink. |+| 6 | MISO | bidirectional | Serial SPI configuration interface master data input/slave data output; digital I/O with 4 mA source/sink. |+| 7 | GIO1 | bidirectional | General-purpose digital I/O pin 1, configurable with PurePath Wireless Configurator; 4 mA source/sink. |+| 8 | GIO2 | bidirectional | General-purpose digital I/O pin 2; digital I/O with 4 mA source/sink. |+| 9 | GIO3 | bidirectional | General-purpose digital I/O pin 3, configurable with PurePath Wireless Configurator; 20 mA source/sink. |+| 10 | IOVDD | power_in | Digital power supply for the digital I/Os in the SPI interface and GIO1-GIO3. |+| 11 | RSTN | input | Active-low device reset with internal pull-up. |+| 12 | IOVDD | power_in | Digital power supply for the RSTN and MCLK digital I/O pins. |+| 13 | MCLK/GIO4 | bidirectional | Master clock output for external audio devices or general-purpose digital I/O pin 4; digital I/O with 4 mA source/sink. |+| 14 | BCLK/GIO5 | bidirectional | I2S/DSP audio interface bit clock input/output or general-purpose digital I/O pin 5; digital I/O with 4 mA source/sink. |+| 15 | WCLK/GIO6 | bidirectional | I2S/DSP audio interface word clock input/output or general-purpose digital I/O pin 6; digital I/O with 4 mA source/sink. |+| 16 | AD0/GIO7 | bidirectional | I2S/DSP audio interface data line 0 input/output or general-purpose digital I/O pin 7; digital I/O with 4 mA source/sink. |+| 17 | AD1/GIO8 | bidirectional | I2S/DSP audio interface data line 1 input/output or general-purpose digital I/O pin 8; digital I/O with 4 mA source/sink. |+| 18 | IOVDD | power_in | Digital power supply for the digital I/Os in audio interface pins BCLK through AD2. |+| 19 | AD2/GIO9 | bidirectional | I2S/DSP audio interface data line 2 input/output, configurable with PurePath Wireless Configurator, or general-purpose digital I/O pin 9; 20 mA source/sink. |+| 20 | AVDD | power_in | Analog power supply connection, 2.0-3.6 V. |+| 21 | X1 | passive | Crystal oscillator pin input for 48 MHz crystal or external clock input. |+| 22 | X0 | passive | Crystal oscillator pin output for 48 MHz crystal. |+| 23 | AVDD | power_in | Analog power supply connection. |+| 24 | RF_P | bidirectional | Positive differential RF input signal to LNA in receive mode or positive differential RF output signal from PA in transmit mode. |+| 25 | RF_N | bidirectional | Negative differential RF input signal to LNA in receive mode or negative differential RF output signal from PA in transmit mode. |+| 26 | AVDD | power_in | Analog power supply connection. |+| 27 | AVDD | power_in | Analog power supply connection. |+| 28 | AVDD | power_in | Analog power supply connection. |+| 29 | VBAT | power_in | Battery voltage supervisor input with threshold level programmable by external resistor to positive battery terminal, input voltage range 0-4.5 V. |+| 30 | RBIAS | output | External precision bias resistor for reference current output, recommended value 56 kΩ ±1%. |+| 31 | AVDD | power_in | Analog power supply connection for guard ring AVDD connection for digital noise isolation. |+| 32 | SCL/GIO10 | bidirectional | I2C master clock line must be connected to external pull-up or general-purpose digital I/O pin 10; digital I/O with 4 mA source/sink. |+| 33 | SDA/GIO11 | bidirectional | I2C master data line must be connected to external pull-up or general-purpose digital I/O pin 11; digital I/O with 4 mA source/sink. |+| 34 | GIO12 | bidirectional | General-purpose digital I/O pin 12; digital I/O with 4 mA source/sink. |+| 35 | GIO13 | bidirectional | General-purpose digital I/O pin 13; digital I/O with 4 mA source/sink. |+| 36 | xPAEN/GIO14 | bidirectional | Control external power amplifier or general-purpose digital I/O pin 14; digital I/O with 20 mA source/sink. |+| 37 | IOVDD | power_in | Digital power supply for SCL through GIO15 pins. |+| 38 | xLNAEN/GIO15 | bidirectional | Control external low-noise amplifier or general-purpose digital I/O pin 15; digital I/O with 20 mA source/sink. |+| 39 | DCPL | power_out | Linear voltage regulator output 1.7-1.85 V for 1 µF decoupling capacitor connection, or external digital supply input 1.62-1.98 V bypassing internal regulator for test purposes. |+| 40 | DVDD | power_in | Digital power supply for the internal linear voltage regulator. |+| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-40-EP(6x6) |+| Category | RF And Wireless |+| Pins | 41 |++## CAD (KiCad official)++- Symbol: `CC8530RHAR`+- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`+- 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)+- 3D model files: `cc8530rhar-etched.step` / `cc8530rhar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cc8530rhar.step` / `cc8530rhar.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cc8520) (25 pp, sha256 `f1bf16d11e543585`, retrieved 2026-10-06, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cc8530rhar-datasheet.pdf)
page.jsonadded+360@@ -0,0 +1,360 @@+{+ "slug": "cc8530rhar",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments RF Transceiver ICs, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "rf and wireless",+ "cc8530rhar",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cc8530rhar.kicad_sym",+ "cc8530rhar.kicad_mod",+ "cc8530rhar.glb",+ "cc8530rhar.step",+ "cc8530rhar.lbr",+ "docs/hero.png",+ "docs/cc8530rhar-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cc8530rhar-hero.glb",+ "cc8530rhar-hero.overlay.json"+ ],+ "component": {+ "mpn": "CC8530RHAR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-40-EP(6x6)",+ "pin_count": 41,+ "category": "RF And Wireless",+ "subcategory": "RF Transceiver ICs",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cc8520",+ "parts": {+ "symbol": "cc8530rhar.kicad_sym",+ "footprint": "cc8530rhar.kicad_mod",+ "model_3d": "cc8530rhar-hero.glb",+ "model_3d_plain": "cc8530rhar.glb",+ "model_3d_step": "cc8530rhar-etched.step",+ "model_3d_step_plain": "cc8530rhar.step",+ "lbr": "cc8530rhar.lbr"+ },+ "distributor_links": {+ "lcsc": 524022,+ "digikey": "296-39986-2-ND",+ "mouser": "595-CC8530RHAR"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T17:07:30Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-39986-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-CC8530RHAR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "xANTN",+ "type": "bidirectional",+ "description": "External antenna switch control (CC8530) or USB D- data line (CC8531); digital I/O with 4 mA source/sink."+ },+ {+ "number": "2",+ "name": "xANTP",+ "type": "bidirectional",+ "description": "External antenna switch control (CC8530) or USB D+ data line (CC8531); digital I/O with 4 mA source/sink."+ },+ {+ "number": "3",+ "name": "CS_N",+ "type": "input",+ "description": "Serial SPI configuration interface active-low chip select with internal pull-up."+ },+ {+ "number": "4",+ "name": "SCLK",+ "type": "bidirectional",+ "description": "Serial SPI configuration interface clock input/output, supports up to 20 MHz; digital I/O with 4 mA source/sink."+ },+ {+ "number": "5",+ "name": "MOSI",+ "type": "bidirectional",+ "description": "Serial SPI configuration interface master data output/slave data input; digital I/O with 4 mA source/sink."+ },+ {+ "number": "6",+ "name": "MISO",+ "type": "bidirectional",+ "description": "Serial SPI configuration interface master data input/slave data output; digital I/O with 4 mA source/sink."+ },+ {+ "number": "7",+ "name": "GIO1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin 1, configurable with PurePath Wireless Configurator; 4 mA source/sink."+ },+ {+ "number": "8",+ "name": "GIO2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin 2; digital I/O with 4 mA source/sink."+ },+ {+ "number": "9",+ "name": "GIO3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin 3, configurable with PurePath Wireless Configurator; 20 mA source/sink."+ },+ {+ "number": "10",+ "name": "IOVDD",+ "type": "power_in",+ "description": "Digital power supply for the digital I/Os in the SPI interface and GIO1-GIO3."+ },+ {+ "number": "11",+ "name": "RSTN",+ "type": "input",+ "description": "Active-low device reset with internal pull-up."+ },+ {+ "number": "12",+ "name": "IOVDD",+ "type": "power_in",+ "description": "Digital power supply for the RSTN and MCLK digital I/O pins."+ },+ {+ "number": "13",+ "name": "MCLK/GIO4",+ "type": "bidirectional",+ "description": "Master clock output for external audio devices or general-purpose digital I/O pin 4; digital I/O with 4 mA source/sink."+ },+ {+ "number": "14",+ "name": "BCLK/GIO5",+ "type": "bidirectional",+ "description": "I2S/DSP audio interface bit clock input/output or general-purpose digital I/O pin 5; digital I/O with 4 mA source/sink."+ },+ {+ "number": "15",+ "name": "WCLK/GIO6",+ "type": "bidirectional",+ "description": "I2S/DSP audio interface word clock input/output or general-purpose digital I/O pin 6; digital I/O with 4 mA source/sink."+ },+ {+ "number": "16",+ "name": "AD0/GIO7",+ "type": "bidirectional",+ "description": "I2S/DSP audio interface data line 0 input/output or general-purpose digital I/O pin 7; digital I/O with 4 mA source/sink."+ },+ {+ "number": "17",+ "name": "AD1/GIO8",+ "type": "bidirectional",+ "description": "I2S/DSP audio interface data line 1 input/output or general-purpose digital I/O pin 8; digital I/O with 4 mA source/sink."+ },+ {+ "number": "18",+ "name": "IOVDD",+ "type": "power_in",+ "description": "Digital power supply for the digital I/Os in audio interface pins BCLK through AD2."+ },+ {+ "number": "19",+ "name": "AD2/GIO9",+ "type": "bidirectional",+ "description": "I2S/DSP audio interface data line 2 input/output, configurable with PurePath Wireless Configurator, or general-purpose digital I/O pin 9; 20 mA source/sink."+ },+ {+ "number": "20",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply connection, 2.0-3.6 V."+ },+ {+ "number": "21",+ "name": "X1",+ "type": "passive",+ "description": "Crystal oscillator pin input for 48 MHz crystal or external clock input."+ },+ {+ "number": "22",+ "name": "X0",+ "type": "passive",+ "description": "Crystal oscillator pin output for 48 MHz crystal."+ },+ {+ "number": "23",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply connection."+ },+ {+ "number": "24",+ "name": "RF_P",+ "type": "bidirectional",+ "description": "Positive differential RF input signal to LNA in receive mode or positive differential RF output signal from PA in transmit mode."+ },+ {+ "number": "25",+ "name": "RF_N",+ "type": "bidirectional",+ "description": "Negative differential RF input signal to LNA in receive mode or negative differential RF output signal from PA in transmit mode."+ },+ {+ "number": "26",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply connection."+ },+ {+ "number": "27",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply connection."+ },+ {+ "number": "28",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply connection."+ },+ {+ "number": "29",+ "name": "VBAT",+ "type": "power_in",+ "description": "Battery voltage supervisor input with threshold level programmable by external resistor to positive battery terminal, input voltage range 0-4.5 V."+ },+ {+ "number": "30",+ "name": "RBIAS",+ "type": "output",+ "description": "External precision bias resistor for reference current output, recommended value 56 kΩ ±1%."+ },+ {+ "number": "31",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply connection for guard ring AVDD connection for digital noise isolation."+ },+ {+ "number": "32",+ "name": "SCL/GIO10",+ "type": "bidirectional",+ "description": "I2C master clock line must be connected to external pull-up or general-purpose digital I/O pin 10; digital I/O with 4 mA source/sink."+ },+ {+ "number": "33",+ "name": "SDA/GIO11",+ "type": "bidirectional",+ "description": "I2C master data line must be connected to external pull-up or general-purpose digital I/O pin 11; digital I/O with 4 mA source/sink."+ },+ {+ "number": "34",+ "name": "GIO12",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin 12; digital I/O with 4 mA source/sink."+ },+ {+ "number": "35",+ "name": "GIO13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin 13; digital I/O with 4 mA source/sink."+ },+ {+ "number": "36",+ "name": "xPAEN/GIO14",+ "type": "bidirectional",+ "description": "Control external power amplifier or general-purpose digital I/O pin 14; digital I/O with 20 mA source/sink."+ },+ {+ "number": "37",+ "name": "IOVDD",+ "type": "power_in",+ "description": "Digital power supply for SCL through GIO15 pins."+ },+ {+ "number": "38",+ "name": "xLNAEN/GIO15",+ "type": "bidirectional",+ "description": "Control external low-noise amplifier or general-purpose digital I/O pin 15; digital I/O with 20 mA source/sink."+ },+ {+ "number": "39",+ "name": "DCPL",+ "type": "power_out",+ "description": "Linear voltage regulator output 1.7-1.85 V for 1 µF decoupling capacitor connection, or external digital supply input 1.62-1.98 V bypassing internal regulator for test purposes."+ },+ {+ "number": "40",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital power supply for the internal linear voltage regulator."+ },+ {+ "number": "41",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: CC8530RHAR is non-USB variant; pins 1-2 function as antenna switch controls (xANTN/xANTP), not USB d; DCPL pin (39) is unusual as both LDO output and potential external supply input for test mode; verif",+ "exposed pad 41 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 10,+ "cost_usd": 0.1936,+ "at": "2026-10-06T17:07:12"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cc8520",+ "pages": 25,+ "sha256": "f1bf16d11e543585",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 41,+ "described": 41,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}