# CC6920BSO-50A

**Cross chip** · Current Sensors · SOP-8

CC6920BSO-50A from Cross chip, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Current Sampled + (primary conductor input, positive terminal). Tied internally to pin 2. Primary current flows from IP+ (pins 1,2) to IP- (pins 3,4). Continuous rating 40 A, peak 100 A for 3 s; conductor resistance ~0.9 mΩ. |
| 2 | IP+ | passive | Current Sampled + (primary conductor input, positive terminal). Tied internally to pin 1. Parallel with pin 1 to share primary current. |
| 3 | IP- | passive | Current Sampled - (primary conductor output, negative terminal). Tied internally to pin 4. Return path for the sensed primary current. |
| 4 | IP- | passive | Current Sampled - (primary conductor output, negative terminal). Tied internally to pin 3. |
| 5 | GND | power_in | Signal ground / device return for the secondary (Hall sensor) side. Reference for VCC, VOUT, and VZCR. |
| 6 | VZCR | output | Zero Current Reference Signal Output. Buffered VCC/2 reference (typ. 1.65 V at VCC=3.3 V). Source current ≤ 400 µA, sink current ≤ 3000 µA. Used to bias external amplifiers to the same zero-current midpoint as VOUT. |
| 7 | OUT | output | Analog voltage output proportional to sensed primary current. VOUT = VCC/2 + 0.0264 × IP (V) for the 50A variant (26.4 mV/A). Zero-current output = VCC/2 (typ. 1.65 V at VCC=3.3 V); guaranteed linear range 0.33-2.97 V. Recommended load ≥1.5 kΩ, ≤1 nF; source ≤6 mA, sink ≤30 mA. |
| 8 | VCC | power_in | Power supply input, 3.0-3.6 V (typ. 3.3 V). Typical supply current 20 mA. Bypass with 0.1 µF to GND close to the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Cross chip |
| Package | SOP-8 |
| Category | Sensor |
| Pins | 8 |

## Ordering variants

- `CC6920BSO-50A`

## CAD (KiCad official)

- Symbol: `CC6920BSO-50A`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `cc6920bso-50a-etched.step` / `cc6920bso-50a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cc6920bso-50a.step` / `cc6920bso-50a.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Cross chip datasheet](docs/cc6920bso-50a-datasheet.pdf) (None pp, sha256 `bf0f27c31807521e`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cc6920bso-50a-datasheet.pdf)